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Searched refs:XSHAL_XT2000_CACHEATTR_WRITEBACK (Results 1 – 15 of 15) sorted by relevance

/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dsystem.h197 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0xFF42442F /* enable caches in write-back mode */ macro
201 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dsystem.h197 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0xFFF24244 /* enable caches in write-back mode */ macro
201 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dsystem.h197 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0xFFF21211 /* enable caches in write-back mode */ macro
201 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dsystem.h214 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0xFFF24244 /* enable caches in write-back mode */ macro
218 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dsystem.h214 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0xFFF2424F /* enable caches in write-back mode */ macro
218 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dsystem.h203 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0x77C373C7 /* enable caches in write-back mode */ macro
207 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dsystem.h203 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0xFF22111F /* enable caches in write-back mode */ macro
207 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dsystem.h214 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0xFF22111F /* enable caches in write-back mode */ macro
218 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dsystem.h214 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0xFFF4422F /* enable caches in write-back mode */ macro
218 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dsystem.h202 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0x37CCC37C /* enable caches in write-back mode */ macro
206 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dsystem.h203 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0x4F424F24 /* enable caches in write-back mode */ macro
207 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dsystem.h218 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0xFF44422F /* enable caches in write-back mode */ macro
222 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dsystem.h218 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0xFF44422F /* enable caches in write-back mode */ macro
222 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dsystem.h218 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0xFF44422F /* enable caches in write-back mode */ macro
222 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dsystem.h218 #define XSHAL_XT2000_CACHEATTR_WRITEBACK 0xFF44422F /* enable caches in write-back mode */ macro
222 #define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enab…