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Searched refs:XSHAL_XT2000_CACHEATTR_WRITEALLOC (Results 1 – 15 of 15) sorted by relevance

/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dsystem.h198 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xFF12112F /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dsystem.h198 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xFFF21211 /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dsystem.h198 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xFFF21211 /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dsystem.h215 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xFFF21211 /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dsystem.h204 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xFF22111F /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dsystem.h215 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xFFF1122F /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dsystem.h215 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xFF22111F /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dsystem.h215 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xFFF2121F /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dsystem.h203 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0x3BCCC3BC /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dsystem.h204 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xBBC3B3CB /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dsystem.h204 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0x1F121F21 /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dsystem.h219 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xFF11122F /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dsystem.h219 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xFF11122F /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dsystem.h219 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xFF11122F /* enable caches in write-allocate mode */ macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dsystem.h219 #define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0xFF11122F /* enable caches in write-allocate mode */ macro