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Searched refs:XCHAL_MMU_CA_BITS (Results 1 – 14 of 14) sorted by relevance

/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-matmap.h174 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-matmap.h178 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-matmap.h179 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-matmap.h174 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-matmap.h177 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-matmap.h178 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-matmap.h179 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-matmap.h179 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-matmap.h179 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-matmap.h182 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-matmap.h183 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro
/hal_xtensa-latest/src/hal/
Dmisc.c110 const unsigned char Xthal_mmu_ca_bits = XCHAL_MMU_CA_BITS;
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-matmap.h189 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro
/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-matmap.h184 #define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ macro