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Searched refs:XCHAL_DTLB_MINWIRED_SETS (Results 1 – 13 of 13) sorted by relevance

/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-matmap.h259 #define XCHAL_DTLB_MINWIRED_SETS 0 /* number of "min-wired" sets */ macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-matmap.h263 #define XCHAL_DTLB_MINWIRED_SETS 0 /* number of "min-wired" sets */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-matmap.h264 #define XCHAL_DTLB_MINWIRED_SETS 0 /* number of "min-wired" sets */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-matmap.h259 #define XCHAL_DTLB_MINWIRED_SETS 0 /* number of "min-wired" sets */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-matmap.h262 #define XCHAL_DTLB_MINWIRED_SETS 0 /* number of "min-wired" sets */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-matmap.h263 #define XCHAL_DTLB_MINWIRED_SETS 0 /* number of "min-wired" sets */ macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-matmap.h264 #define XCHAL_DTLB_MINWIRED_SETS 0 /* number of "min-wired" sets */ macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-matmap.h264 #define XCHAL_DTLB_MINWIRED_SETS 0 /* number of "min-wired" sets */ macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-matmap.h264 #define XCHAL_DTLB_MINWIRED_SETS 0 /* number of "min-wired" sets */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-matmap.h267 #define XCHAL_DTLB_MINWIRED_SETS 0 /* number of "min-wired" sets */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-matmap.h268 #define XCHAL_DTLB_MINWIRED_SETS 0 /* number of "min-wired" sets */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-matmap.h432 #define XCHAL_DTLB_MINWIRED_SETS 3 /* number of "min-wired" sets */ macro
/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-matmap.h442 #define XCHAL_DTLB_MINWIRED_SETS 3 /* number of "min-wired" sets */ macro