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Searched refs:XCHAL_DATARAM1_PADDR (Results 1 – 6 of 6) sorted by relevance

/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h332 #define XCHAL_DATARAM1_PADDR 0x3FFC0000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h306 #define XCHAL_DATARAM1_PADDR 0x3B6F0000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h306 #define XCHAL_DATARAM1_PADDR 0x596F0000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h404 #define XCHAL_DATARAM1_PADDR 0x3FFC0000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h435 #define XCHAL_DATARAM1_PADDR 0x00C00000 /* physical address */ macro
/hal_xtensa-latest/include/xtensa/config/
Dcore.h753 #define XCHAL_DRAM1_PADDR XCHAL_DATARAM1_PADDR /* (DEPRECATED) */