Home
last modified time | relevance | path

Searched refs:XCHAL_DATARAM0_PADDR (Results 1 – 11 of 11) sorted by relevance

/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h330 #define XCHAL_DATARAM0_PADDR 0x9F000000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h323 #define XCHAL_DATARAM0_PADDR 0x3FFE0000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h299 #define XCHAL_DATARAM0_PADDR 0x3B6E8000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h299 #define XCHAL_DATARAM0_PADDR 0x596E8000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h420 #define XCHAL_DATARAM0_PADDR 0x1FE00000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h420 #define XCHAL_DATARAM0_PADDR 0x3FE00000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h328 #define XCHAL_DATARAM0_PADDR 0x21180000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h395 #define XCHAL_DATARAM0_PADDR 0x3FFE0000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h420 #define XCHAL_DATARAM0_PADDR 0x24000000 /* physical address */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h426 #define XCHAL_DATARAM0_PADDR 0x00800000 /* physical address */ macro
/hal_xtensa-latest/include/xtensa/config/
Dcore.h750 #define XCHAL_DRAM0_PADDR XCHAL_DATARAM0_PADDR /* (DEPRECATED) */