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Searched refs:XCHAL_CA_WRITETHRU_RW (Results 1 – 4 of 4) sorted by relevance

/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-matmap.h125 #define XCHAL_CA_WRITETHRU_RW 0 /* cache enabled (write-through) mode (no exec) (FALLBACK) */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-matmap.h126 #define XCHAL_CA_WRITETHRU_RW 0 /* cache enabled (write-through) mode (no exec) (FALLBACK) */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-matmap.h129 #define XCHAL_CA_WRITETHRU_RW 10 /* cache enabled (write-through) mode (no exec) */ macro
/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-matmap.h122 #define XCHAL_CA_WRITETHRU_RW 10 /* cache enabled (write-through) mode (no exec) */ macro