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Searched refs:XCHAL_CA_BYPASS_RW (Results 1 – 6 of 6) sorted by relevance

/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-matmap.h71 #define XCHAL_CA_BYPASS_RW (XTHAL_AR_RW | XTHAL_MEM_DEVICE) macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-matmap.h71 #define XCHAL_CA_BYPASS_RW (XTHAL_AR_RW | XTHAL_MEM_DEVICE) macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-matmap.h124 #define XCHAL_CA_BYPASS_RW 0 /* cache disabled (bypassed) mode (no exec) */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-matmap.h125 #define XCHAL_CA_BYPASS_RW 0 /* cache disabled (bypassed) mode (no exec) */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-matmap.h128 #define XCHAL_CA_BYPASS_RW 2 /* cache disabled (bypassed) mode (no exec) */ macro
/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-matmap.h121 #define XCHAL_CA_BYPASS_RW 2 /* cache disabled (bypassed) mode (no exec) */ macro