Home
last modified time | relevance | path

Searched refs:XCHAL_NUM_DATAROM (Results 1 – 15 of 15) sorted by relevance

/hal_xtensa-3.7.0/src/hal/
Dmisc.c137 const unsigned char Xthal_num_datarom = XCHAL_NUM_DATAROM;
158 MEMTRIPLET(XCHAL_NUM_DATAROM, datarom, DATAROM)
173 const unsigned char Xthal_num_drom = XCHAL_NUM_DATAROM; /*DEPRECATED*/
/hal_xtensa-3.7.0/zephyr/soc/dc233c/xtensa/config/
Dcore-isa.h216 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h315 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h315 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h315 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h315 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h308 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h403 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h286 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h286 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h392 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h313 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h403 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h401 #define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ macro
/hal_xtensa-3.7.0/include/xtensa/config/
Dcore.h728 #define XCHAL_NUM_DROM XCHAL_NUM_DATAROM /* (DEPRECATED) */