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Searched refs:XCHAL_CA_BYPASSBUF (Results 1 – 12 of 12) sorted by relevance

/hal_xtensa-3.7.0/src/hal/
Dattribute.c183 # ifdef XCHAL_CA_BYPASSBUF in xthal_set_region_attribute()
184 # define CA_BYPASSBUF XCHAL_CA_BYPASSBUF in xthal_set_region_attribute()
/hal_xtensa-3.7.0/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-matmap.h68 #define XCHAL_CA_BYPASSBUF (XTHAL_AR_RWXrwx | XTHAL_MEM_DEVICE |\ macro
/hal_xtensa-3.7.0/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-matmap.h114 #define XCHAL_CA_BYPASSBUF 6 /* cache disabled (bypassed) bufferable mode */ macro
/hal_xtensa-3.7.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-matmap.h120 #define XCHAL_CA_BYPASSBUF 6 /* cache disabled (bypassed) bufferable mode */ macro
/hal_xtensa-3.7.0/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-matmap.h120 #define XCHAL_CA_BYPASSBUF 6 /* cache disabled (bypassed) bufferable mode */ macro
/hal_xtensa-3.7.0/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-matmap.h114 #define XCHAL_CA_BYPASSBUF 6 /* cache disabled (bypassed) bufferable mode */ macro
/hal_xtensa-3.7.0/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-matmap.h119 #define XCHAL_CA_BYPASSBUF 6 /* cache disabled (bypassed) bufferable mode */ macro
/hal_xtensa-3.7.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-matmap.h120 #define XCHAL_CA_BYPASSBUF 6 /* cache disabled (bypassed) bufferable mode */ macro
/hal_xtensa-3.7.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-matmap.h120 #define XCHAL_CA_BYPASSBUF 6 /* cache disabled (bypassed) bufferable mode */ macro
/hal_xtensa-3.7.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-matmap.h120 #define XCHAL_CA_BYPASSBUF 6 /* cache disabled (bypassed) bufferable mode */ macro
/hal_xtensa-3.7.0/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-matmap.h120 #define XCHAL_CA_BYPASSBUF 6 /* cache disabled (bypassed) bufferable mode */ macro
/hal_xtensa-3.7.0/zephyr/soc/sample_controller/xtensa/config/
Dcore-matmap.h119 #define XCHAL_CA_BYPASSBUF 6 /* cache disabled (bypassed) bufferable mode */ macro