XCHAL_CACHE_LINESIZE_MAX (reference) in projects: hal_xtensa-3.7.0

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Searched refs:XCHAL_CACHE_LINESIZE_MAX (Results 1 – 1 of 1) sorted by relevance

/hal_xtensa-3.7.0/include/xtensa/config/
D	core.h	`780 # define XCHAL_CACHE_LINESIZE_MAX XCHAL_ICACHE_LINESIZE macro 783 # define XCHAL_CACHE_LINESIZE_MAX XCHAL_DCACHE_LINESIZE macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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Zephyr-Core-3.5.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
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babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
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