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Searched refs:ptr (Results 1 – 14 of 14) sorted by relevance

/hal_xtensa-3.6.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dtie-asm.h78 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
82 xchal_sa_align \ptr, 0, 1016, 4, 4
84 s32i \at1, \ptr, .Lxchal_ofs_+0
87 xchal_sa_align \ptr, 0, 1016, 4, 4
92 xchal_sa_align \ptr, 0, 1012, 4, 4
94 s32i \at1, \ptr, .Lxchal_ofs_+0
96 s32i \at1, \ptr, .Lxchal_ofs_+4
99 xchal_sa_align \ptr, 0, 1012, 4, 4
124 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
128 xchal_sa_align \ptr, 0, 1016, 4, 4
[all …]
/hal_xtensa-3.6.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dtie-asm.h78 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
82 xchal_sa_align \ptr, 0, 1016, 4, 4
84 s32i \at1, \ptr, .Lxchal_ofs_+0
87 xchal_sa_align \ptr, 0, 1016, 4, 4
92 xchal_sa_align \ptr, 0, 1012, 4, 4
94 s32i \at1, \ptr, .Lxchal_ofs_+0
96 s32i \at1, \ptr, .Lxchal_ofs_+4
99 xchal_sa_align \ptr, 0, 1012, 4, 4
124 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
128 xchal_sa_align \ptr, 0, 1016, 4, 4
[all …]
/hal_xtensa-3.6.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dtie-asm.h78 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
82 xchal_sa_align \ptr, 0, 1016, 4, 4
84 s32i \at1, \ptr, .Lxchal_ofs_+0
87 xchal_sa_align \ptr, 0, 1016, 4, 4
92 xchal_sa_align \ptr, 0, 1012, 4, 4
94 s32i \at1, \ptr, .Lxchal_ofs_+0
96 s32i \at1, \ptr, .Lxchal_ofs_+4
99 xchal_sa_align \ptr, 0, 1012, 4, 4
124 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
128 xchal_sa_align \ptr, 0, 1016, 4, 4
[all …]
/hal_xtensa-3.6.0/zephyr/soc/mt8195_adsp/xtensa/config/
Dtie-asm.h78 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
82 xchal_sa_align \ptr, 0, 1016, 4, 4
84 s32i \at1, \ptr, .Lxchal_ofs_+0
87 xchal_sa_align \ptr, 0, 1016, 4, 4
92 xchal_sa_align \ptr, 0, 1016, 4, 4
94 s32i \at1, \ptr, .Lxchal_ofs_+0
97 xchal_sa_align \ptr, 0, 1016, 4, 4
122 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
126 xchal_sa_align \ptr, 0, 1016, 4, 4
127 l32i \at1, \ptr, .Lxchal_ofs_+0
[all …]
/hal_xtensa-3.6.0/zephyr/soc/nxp_imx8ulp/xtensa/config/
Dtie-asm.h76 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
80 xchal_sa_align \ptr, 0, 1016, 4, 4
82 s32i \at1, \ptr, .Lxchal_ofs_+0
85 xchal_sa_align \ptr, 0, 1016, 4, 4
90 xchal_sa_align \ptr, 0, 1012, 4, 4
92 s32i \at1, \ptr, .Lxchal_ofs_+0
94 s32i \at1, \ptr, .Lxchal_ofs_+4
97 xchal_sa_align \ptr, 0, 1012, 4, 4
102 xchal_sa_align \ptr, 0, 996, 4, 4
104 s32i \at1, \ptr, .Lxchal_ofs_+0
[all …]
/hal_xtensa-3.6.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dtie-asm.h78 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
82 xchal_sa_align \ptr, 0, 1016, 4, 4
84 s32i \at1, \ptr, .Lxchal_ofs_+0
87 xchal_sa_align \ptr, 0, 1016, 4, 4
92 xchal_sa_align \ptr, 0, 1012, 4, 4
94 s32i \at1, \ptr, .Lxchal_ofs_+0
96 s32i \at1, \ptr, .Lxchal_ofs_+4
99 xchal_sa_align \ptr, 0, 1012, 4, 4
124 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
128 xchal_sa_align \ptr, 0, 1016, 4, 4
[all …]
/hal_xtensa-3.6.0/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dtie-asm.h76 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
80 xchal_sa_align \ptr, 0, 1016, 4, 4
82 s32i \at1, \ptr, .Lxchal_ofs_+0
85 xchal_sa_align \ptr, 0, 1016, 4, 4
90 xchal_sa_align \ptr, 0, 1012, 4, 4
92 s32i \at1, \ptr, .Lxchal_ofs_+0
94 s32i \at1, \ptr, .Lxchal_ofs_+4
97 xchal_sa_align \ptr, 0, 1012, 4, 4
122 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
126 xchal_sa_align \ptr, 0, 1016, 4, 4
[all …]
/hal_xtensa-3.6.0/zephyr/soc/mimx8ml8/xtensa/config/
Dtie-asm.h76 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
80 xchal_sa_align \ptr, 0, 1016, 4, 4
82 s32i \at1, \ptr, .Lxchal_ofs_+0
85 xchal_sa_align \ptr, 0, 1016, 4, 4
90 xchal_sa_align \ptr, 0, 1012, 4, 4
92 s32i \at1, \ptr, .Lxchal_ofs_+0
94 s32i \at1, \ptr, .Lxchal_ofs_+4
97 xchal_sa_align \ptr, 0, 1012, 4, 4
122 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
126 xchal_sa_align \ptr, 0, 1016, 4, 4
[all …]
/hal_xtensa-3.6.0/zephyr/soc/intel_apl_adsp/xtensa/config/
Dtie-asm.h78 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
82 xchal_sa_align \ptr, 0, 1016, 4, 4
84 s32i \at1, \ptr, .Lxchal_ofs_+0
87 xchal_sa_align \ptr, 0, 1016, 4, 4
92 xchal_sa_align \ptr, 0, 1012, 4, 4
94 s32i \at1, \ptr, .Lxchal_ofs_+0
96 s32i \at1, \ptr, .Lxchal_ofs_+4
99 xchal_sa_align \ptr, 0, 1012, 4, 4
124 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
128 xchal_sa_align \ptr, 0, 1016, 4, 4
[all …]
/hal_xtensa-3.6.0/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dtie-asm.h78 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
82 xchal_sa_align \ptr, 0, 1016, 4, 4
84 s32i \at1, \ptr, .Lxchal_ofs_+0
87 xchal_sa_align \ptr, 0, 1016, 4, 4
92 xchal_sa_align \ptr, 0, 1012, 4, 4
94 s32i \at1, \ptr, .Lxchal_ofs_+0
96 s32i \at1, \ptr, .Lxchal_ofs_+4
99 xchal_sa_align \ptr, 0, 1012, 4, 4
104 xchal_sa_align \ptr, 0, 996, 4, 4
106 s32i \at1, \ptr, .Lxchal_ofs_+0
[all …]
/hal_xtensa-3.6.0/zephyr/soc/dc233c/xtensa/config/
Dtie-asm.h56 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
59 xchal_sa_align \ptr, 0, 1024-8, 4, 4
62 s32i \at1, \ptr, .Lxchal_ofs_ + 0
63 s32i \at2, \ptr, .Lxchal_ofs_ + 4
67 xchal_sa_align \ptr, 0, 1024-16, 4, 4
70 s32i \at1, \ptr, .Lxchal_ofs_ + 0
71 s32i \at2, \ptr, .Lxchal_ofs_ + 4
74 s32i \at1, \ptr, .Lxchal_ofs_ + 8
75 s32i \at2, \ptr, .Lxchal_ofs_ + 12
79 xchal_sa_align \ptr, 0, 1024-4, 4, 4
[all …]
/hal_xtensa-3.6.0/zephyr/soc/sample_controller/xtensa/config/
Dtie-asm.h76 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
80 xchal_sa_align \ptr, 0, 1016, 4, 4
82 s32i \at1, \ptr, .Lxchal_ofs_+0
85 xchal_sa_align \ptr, 0, 1016, 4, 4
110 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
114 xchal_sa_align \ptr, 0, 1016, 4, 4
115 l32i \at1, \ptr, .Lxchal_ofs_+0
119 xchal_sa_align \ptr, 0, 1016, 4, 4
/hal_xtensa-3.6.0/src/hal/
Dstate.c161 unsigned int *ptr; in xthal_init_mem_extra() local
164 ptr = (unsigned int *)address; in xthal_init_mem_extra()
166 while( ptr < end ) in xthal_init_mem_extra()
168 *ptr++ = 0; in xthal_init_mem_extra()
176 unsigned int *ptr; in xthal_init_mem_cp() local
182 ptr = (unsigned int *)address; in xthal_init_mem_cp()
183 while( ptr < end ) in xthal_init_mem_cp()
185 *ptr++ = 0; in xthal_init_mem_cp()
/hal_xtensa-3.6.0/include/xtensa/config/
Dcore.h993 .macro xchal_sa_align ptr minofs maxofs ofsalign totalign
1001 addi \ptr, \ptr, (.Lxchal_ofs_ & .Ligmask)
1021 .macro xchal_sa_ptr_restore ptr
1023 addi \ptr, \ptr, - .Lxchal_pofs_
1042 .macro xchal_atmps_loadstore inst ptr offset nreq aa=0 ab=0 ac=0 ad=0
1050 \inst \reg, \ptr, .Laofs_+\offset