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Searched refs:op0 (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/soc/nxp/rw/
Dflash_config.h53 #define FC_FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \ argument
54 (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | \
/Zephyr-latest/soc/nxp/imxrt/
Dflexspi_nor_config.h65 #define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \ argument
66 (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | \
/Zephyr-latest/soc/microchip/mec/mec15xx/
Dsoc_espi_saf_v1.h132 #define MCHP_SAF_OPCODE_REG_VAL(op0, op1, op2, op3) \ argument
133 (((uint32_t)(op0)&0xffU) | (((uint32_t)(op1)&0xffU) << 8) | \
/Zephyr-latest/soc/microchip/mec/mec172x/
Dsoc_espi_saf_v2.h156 #define MCHP_SAF_OPCODE_REG_VAL(op0, op1, op2, op3) \ argument
157 (((uint32_t)(op0)&0xffU) | (((uint32_t)(op1)&0xffU) << 8) | \