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Searched refs:addr (Results 1 – 7 of 7) sorted by relevance

/hal_xtensa-3.6.0/include/xtensa/
Dcore-macros.h108 # define xthal_icache_line_invalidate(addr) do { void *__a = (void*)(addr); \ argument
112 # define xthal_icache_line_invalidate(addr) do {/*nothing*/} while(0) argument
116 # define xthal_icache_line_lock(addr) do { void *__a = (void*)(addr); \ argument
119 # define xthal_icache_line_unlock(addr) do { void *__a = (void*)(addr); \ argument
123 # define xthal_icache_line_lock(addr) do {/*nothing*/} while(0) argument
124 # define xthal_icache_line_unlock(addr) do {/*nothing*/} while(0) argument
143 # define xthal_dcache_line_invalidate(addr) do { void *__a = (void*)(addr); \ argument
146 # define xthal_dcache_line_writeback(addr) do { void *__a = (void*)(addr); \ argument
149 # define xthal_dcache_line_writeback_inv(addr) do { void *__a = (void*)(addr); \ argument
154 # define xthal_dcache_line_prefetch_for_read(addr) do { \ argument
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Dhal.h259 extern void xthal_icache_region_invalidate( void *addr, unsigned size );
260 extern void xthal_dcache_region_invalidate( void *addr, unsigned size );
261 extern void xthal_dcache_region_writeback( void *addr, unsigned size );
262 extern void xthal_dcache_region_writeback_inv( void *addr, unsigned size );
266 extern void xthal_icache_line_invalidate(void *addr);
267 extern void xthal_dcache_line_invalidate(void *addr);
268 extern void xthal_dcache_line_writeback(void *addr);
269 extern void xthal_dcache_line_writeback_inv(void *addr);
348 extern unsigned int xthal_set_soft_break(void *addr);
349 extern void xthal_remove_soft_break(void *addr, unsigned int);
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Dcacheasm.h245 .macro cache_hit_region cainst, linesize_log2, addr, asize, askew, awb=a0
248 extui \askew, \addr, 0, \linesize_log2 // get unalignment amount of \addr
258 \cainst \addr, 0
266 addi \addr, \addr, (1 << \linesize_log2) // move to next line
/hal_xtensa-3.6.0/src/hal/
Ddebug.c67 xthal_set_soft_break(void *addr) in xthal_set_soft_break() argument
70 int is24bit = (xthal_disassemble_size( (unsigned char *)addr ) == 3); in xthal_set_soft_break()
74 inst = ((((char *)addr)[0])<<24) + in xthal_set_soft_break()
75 ((((char *)addr)[1])<<16) + in xthal_set_soft_break()
76 ((((char *)addr)[2])<<8); in xthal_set_soft_break()
78 inst = ((((char *)addr)[0])) + in xthal_set_soft_break()
79 ((((char *)addr)[1])<<8) + in xthal_set_soft_break()
80 ((((char *)addr)[2])<<16); in xthal_set_soft_break()
85 ((unsigned char *)addr)[0] = 0x00; in xthal_set_soft_break()
86 ((unsigned char *)addr)[1] = 0x04; in xthal_set_soft_break()
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Dset_region_translate.c40 static inline unsigned read_dtlb1_entry(unsigned addr) { in read_dtlb1_entry() argument
44 : "a" (addr)); in read_dtlb1_entry()
48 static inline unsigned read_itlb1_entry(unsigned addr) { in read_itlb1_entry() argument
52 : "a" (addr)); in read_itlb1_entry()
56 static inline unsigned probe_dtlb(unsigned addr) { in probe_dtlb() argument
60 : "a" (addr)); in probe_dtlb()
64 static inline unsigned probe_itlb(unsigned addr) { in probe_itlb() argument
68 : "a" (addr)); in probe_itlb()
72 static inline void invalidate_dtlb_entry(unsigned addr) { in invalidate_dtlb_entry() argument
74 : : "a" (addr)); in invalidate_dtlb_entry()
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Ddisass.c96 unsigned addr = (unsigned)tgt_address; in xthal_disassemble() local
98 OUTC( _hexc[(addr >> 28) & 0xF] ); in xthal_disassemble()
99 addr <<= 4; in xthal_disassemble()
Dmpu.c61 unsigned int addr, int* infgmap);
110 static void assert_attributes_equivalent(unsigned addr, const xthal_MPU_entry* initial, in assert_attributes_equivalent() argument
114 xthal_MPU_entry e1 = _xthal_get_entry(initial, bg, addr, 0); in assert_attributes_equivalent()
115 xthal_MPU_entry e2 = _xthal_get_entry(fg, bg, addr, 0); in assert_attributes_equivalent()
362 unsigned int addr, int* infgmap) in _xthal_get_entry() argument
367 if (XTHAL_MPU_ENTRY_GET_VSTARTADDR(fg[i]) <= addr) in _xthal_get_entry()
381 if (XTHAL_MPU_ENTRY_GET_VSTARTADDR(bg[i]) <= addr) in _xthal_get_entry()
671 void* addr = (void*) XTHAL_MPU_ENTRY_GET_VSTARTADDR(fg[ip]); in safe_region() local
701 xthal_dcache_region_writeback(addr, length); in safe_region()
720 xthal_icache_region_invalidate(addr, length); in safe_region()
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