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Searched refs:XCHAL_TOTAL_SA_SIZE (Results 1 – 14 of 14) sorted by relevance

/hal_xtensa-3.6.0/zephyr/soc/sample_controller/xtensa/config/
Dtie.h45 #define XCHAL_TOTAL_SA_SIZE 16 /* with 16-byte align padding */ macro
/hal_xtensa-3.6.0/zephyr/soc/dc233c/xtensa/config/
Dtie.h68 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_apl_adsp/xtensa/config/
Dtie.h70 #define XCHAL_TOTAL_SA_SIZE 208 /* with 16-byte align padding */ macro
/hal_xtensa-3.6.0/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dtie.h70 #define XCHAL_TOTAL_SA_SIZE 208 /* with 16-byte align padding */ macro
/hal_xtensa-3.6.0/zephyr/soc/mt8195_adsp/xtensa/config/
Dtie.h70 #define XCHAL_TOTAL_SA_SIZE 224 /* with 16-byte align padding */ macro
/hal_xtensa-3.6.0/src/hal/
Dstate.c75 const unsigned int Xthal_all_extra_size = XCHAL_TOTAL_SA_SIZE;
/hal_xtensa-3.6.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dtie.h70 #define XCHAL_TOTAL_SA_SIZE 224 /* with 16-byte align padding */ macro
/hal_xtensa-3.6.0/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dtie.h68 #define XCHAL_TOTAL_SA_SIZE 224 /* with 16-byte align padding */ macro
/hal_xtensa-3.6.0/zephyr/soc/mimx8ml8/xtensa/config/
Dtie.h68 #define XCHAL_TOTAL_SA_SIZE 224 /* with 16-byte align padding */ macro
/hal_xtensa-3.6.0/zephyr/soc/nxp_imx8ulp/xtensa/config/
Dtie.h68 #define XCHAL_TOTAL_SA_SIZE 256 /* with 16-byte align padding */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dtie.h73 #define XCHAL_TOTAL_SA_SIZE 272 /* with 16-byte align padding */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dtie.h73 #define XCHAL_TOTAL_SA_SIZE 272 /* with 16-byte align padding */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dtie.h73 #define XCHAL_TOTAL_SA_SIZE 272 /* with 16-byte align padding */ macro
/hal_xtensa-3.6.0/include/xtensa/config/
Dcore.h962 #define XCHAL_CPEXTRA_SA_SIZE XCHAL_TOTAL_SA_SIZE