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Searched refs:XCHAL_MMU_ASID_INVALID (Results 1 – 11 of 11) sorted by relevance

/hal_xtensa-3.6.0/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-matmap.h171 #define XCHAL_MMU_ASID_INVALID 0 /* ASID value indicating invalid address space */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-matmap.h175 #define XCHAL_MMU_ASID_INVALID 0 /* ASID value indicating invalid address space */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-matmap.h175 #define XCHAL_MMU_ASID_INVALID 0 /* ASID value indicating invalid address space */ macro
/hal_xtensa-3.6.0/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-matmap.h171 #define XCHAL_MMU_ASID_INVALID 0 /* ASID value indicating invalid address space */ macro
/hal_xtensa-3.6.0/zephyr/soc/nxp_imx8ulp/xtensa/config/
Dcore-matmap.h174 #define XCHAL_MMU_ASID_INVALID 0 /* ASID value indicating invalid address space */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-matmap.h176 #define XCHAL_MMU_ASID_INVALID 0 /* ASID value indicating invalid address space */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-matmap.h176 #define XCHAL_MMU_ASID_INVALID 0 /* ASID value indicating invalid address space */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-matmap.h176 #define XCHAL_MMU_ASID_INVALID 0 /* ASID value indicating invalid address space */ macro
/hal_xtensa-3.6.0/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-matmap.h180 #define XCHAL_MMU_ASID_INVALID 0 /* ASID value indicating invalid address space */ macro
/hal_xtensa-3.6.0/zephyr/soc/sample_controller/xtensa/config/
Dcore-matmap.h179 #define XCHAL_MMU_ASID_INVALID 0 /* ASID value indicating invalid address space */ macro
/hal_xtensa-3.6.0/zephyr/soc/dc233c/xtensa/config/
Dcore-matmap.h181 #define XCHAL_MMU_ASID_INVALID 0 /* ASID value indicating invalid address space */ macro