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Searched refs:XCHAL_HAVE_MEM_ECC_PARITY (Results 1 – 14 of 14) sorted by relevance

/hal_xtensa-3.6.0/include/xtensa/
Dxtruntime-core-state.h122 #if XCHAL_HAVE_MEM_ECC_PARITY
/hal_xtensa-3.6.0/zephyr/soc/dc233c/xtensa/config/
Dcore-isa.h382 #define XCHAL_HAVE_MEM_ECC_PARITY 0 /* local memory ECC/parity */ macro
/hal_xtensa-3.6.0/src/hal/
Dmem_ecc_parity.S96 #if XCHAL_HAVE_MEM_ECC_PARITY
/hal_xtensa-3.6.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h479 #define XCHAL_HAVE_MEM_ECC_PARITY 1 /* local memory ECC/parity */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h479 #define XCHAL_HAVE_MEM_ECC_PARITY 1 /* local memory ECC/parity */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h479 #define XCHAL_HAVE_MEM_ECC_PARITY 1 /* local memory ECC/parity */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h502 #define XCHAL_HAVE_MEM_ECC_PARITY 1 /* local memory ECC/parity */ macro
/hal_xtensa-3.6.0/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h521 #define XCHAL_HAVE_MEM_ECC_PARITY 0 /* local memory ECC/parity */ macro
/hal_xtensa-3.6.0/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h529 #define XCHAL_HAVE_MEM_ECC_PARITY 0 /* local memory ECC/parity */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h584 #define XCHAL_HAVE_MEM_ECC_PARITY 0 /* local memory ECC/parity */ macro
/hal_xtensa-3.6.0/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h529 #define XCHAL_HAVE_MEM_ECC_PARITY 0 /* local memory ECC/parity */ macro
/hal_xtensa-3.6.0/zephyr/soc/nxp_imx8ulp/xtensa/config/
Dcore-isa.h556 #define XCHAL_HAVE_MEM_ECC_PARITY 0 /* local memory ECC/parity */ macro
/hal_xtensa-3.6.0/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h614 #define XCHAL_HAVE_MEM_ECC_PARITY 0 /* local memory ECC/parity */ macro
/hal_xtensa-3.6.0/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h694 #define XCHAL_HAVE_MEM_ECC_PARITY 0 /* local memory ECC/parity */ macro