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Searched refs:XCHAL_CA_WRITETHRU (Results 1 – 15 of 15) sorted by relevance

/hal_xtensa-3.6.0/src/hal/
Dcoherence.c44 xthal_set_region_attribute(0,0xFFFFFFFF, XCHAL_CA_WRITETHRU, XTHAL_CAFLAG_EXPAND); in xthal_cache_coherence_optout()
Dattribute.c188 # define CA_WRITETHRU XCHAL_CA_WRITETHRU in xthal_set_region_attribute()
Dset_region_translate.c277 # define CA_WRITETHRU XCHAL_CA_WRITETHRU
/hal_xtensa-3.6.0/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-matmap.h64 #define XCHAL_CA_WRITETHRU (XTHAL_MEM_WRITETHRU | XTHAL_AR_RWXrwx) macro
/hal_xtensa-3.6.0/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-matmap.h115 #define XCHAL_CA_WRITETHRU 1 /* cache enabled (write-through) mode */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-matmap.h120 #define XCHAL_CA_WRITETHRU 1 /* cache enabled (write-through) mode */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-matmap.h121 #define XCHAL_CA_WRITETHRU 1 /* cache enabled (write-through) mode */ macro
/hal_xtensa-3.6.0/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-matmap.h115 #define XCHAL_CA_WRITETHRU 1 /* cache enabled (write-through) mode */ macro
/hal_xtensa-3.6.0/zephyr/soc/nxp_imx8ulp/xtensa/config/
Dcore-matmap.h120 #define XCHAL_CA_WRITETHRU 1 /* cache enabled (write-through) mode */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-matmap.h121 #define XCHAL_CA_WRITETHRU 1 /* cache enabled (write-through) mode */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-matmap.h121 #define XCHAL_CA_WRITETHRU 1 /* cache enabled (write-through) mode */ macro
/hal_xtensa-3.6.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-matmap.h121 #define XCHAL_CA_WRITETHRU 1 /* cache enabled (write-through) mode */ macro
/hal_xtensa-3.6.0/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-matmap.h121 #define XCHAL_CA_WRITETHRU 1 /* cache enabled (write-through) mode */ macro
/hal_xtensa-3.6.0/zephyr/soc/sample_controller/xtensa/config/
Dcore-matmap.h120 #define XCHAL_CA_WRITETHRU 1 /* cache enabled (write-through) mode */ macro
/hal_xtensa-3.6.0/zephyr/soc/dc233c/xtensa/config/
Dcore-matmap.h114 #define XCHAL_CA_WRITETHRU 11 /* cache enabled (write-through) mode */ macro