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Searched refs:XCHAL_CACHE_PREFCTL_DEFAULT (Results 1 – 2 of 2) sorted by relevance

/hal_xtensa-3.6.0/include/xtensa/config/
Dcore.h765 #define XCHAL_CACHE_PREFCTL_DEFAULT 0x00044 /* enabled, not aggressive */ macro
767 #define XCHAL_CACHE_PREFCTL_DEFAULT 0x01044 /* + enable prefetch to L1 */ macro
769 #define XCHAL_CACHE_PREFCTL_DEFAULT 0x81044 /* 12 entries for block ops */ macro
771 #define XCHAL_CACHE_PREFCTL_DEFAULT 0x51044 /* 5 entries for block ops */ macro
773 #define XCHAL_CACHE_PREFCTL_DEFAULT 0x01044 /* 0 entries for block ops */ macro
/hal_xtensa-3.6.0/src/hal/
Dcache_asm.S828 movi a5, XCHAL_CACHE_PREFCTL_DEFAULT
868 movi a3, XCHAL_CACHE_PREFCTL_DEFAULT