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Searched refs:xthal_dcache_block_writeback_inv (Results 1 – 1 of 1) sorted by relevance

/hal_xtensa-3.5.0/include/xtensa/
Dcore-macros.h227 # define xthal_dcache_block_writeback_inv(addr, size) do { \ macro
278 # define xthal_dcache_block_writeback_inv(addr, size) do {/*nothing*/} while(0) macro