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Searched refs:size (Results 1 – 20 of 20) sorted by relevance

/hal_xtensa-3.5.0/include/xtensa/
Dcore-macros.h193 # define _XTHAL_DCACHE_BLOCK_UPGRADE(addr, size, type) \ argument
195 type((const int*)addr, size); \
200 # define _XTHAL_DCACHE_BLOCK_DOWNGRADE(addr, size, type) \ argument
201 unsigned _s = size; \
211 # define _XTHAL_DCACHE_BLOCK_DOWNGRADE_MAX(addr, size, type, max) \ argument
213 unsigned _s = size; \
218 _XTHAL_DCACHE_BLOCK_DOWNGRADE(addr, size, type); \
221 # define xthal_dcache_block_invalidate(addr, size) do { \ argument
222 _XTHAL_DCACHE_BLOCK_DOWNGRADE(addr, size, XT_DHI_B); \
224 # define xthal_dcache_block_writeback(addr, size) do { \ argument
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Dxtruntime-frames.h35 #define STRUCT_FIELD(ctype,size,pre,name) pre##name: .space size argument
36 #define STRUCT_AFIELD(ctype,size,pre,name,n) pre##name: .if n ; .space (size)*(n) ; .endif argument
37 #define STRUCT_AFIELD_A(ctype,size,align,pre,name,n) .balign align ; pre##name: .if n ; .space (siz… argument
41 #define STRUCT_FIELD(ctype,size,pre,name) ctype name; argument
42 #define STRUCT_AFIELD(ctype,size,pre,name,n) ctype name[n]; argument
43 #define STRUCT_AFIELD_A(ctype,size,align,pre,name,n) ctype name[n] __attribute__((aligned(align))); argument
Dtrax-api.h61 extern int trax_read_memory(tpack_channel *tchan, int address, int size, unsigned char *pdata);
62 extern int trax_fill_memory(tpack_channel *tchan, int address, int size, tpack_u32 pattern);
63 extern int trax_enumerate_devices(tpack_channel *tchan, int * buf, int * size);
68 extern int trax_create_tracefile(tpack_channel *traxchan, int size, unsigned char * data,
Dhal.h259 extern void xthal_icache_region_invalidate( void *addr, unsigned size );
260 extern void xthal_dcache_region_invalidate( void *addr, unsigned size );
261 extern void xthal_dcache_region_writeback( void *addr, unsigned size );
262 extern void xthal_dcache_region_writeback_inv( void *addr, unsigned size );
853 extern int xthal_set_region_attribute( void *addr, unsigned size,
879 extern void xthal_icache_region_lock( void *addr, unsigned size );
880 extern void xthal_dcache_region_lock( void *addr, unsigned size );
882 extern void xthal_icache_region_unlock( void *addr, unsigned size );
883 extern void xthal_dcache_region_unlock( void *addr, unsigned size );
886 extern void xthal_icache_hugerange_invalidate( void *addr, unsigned size );
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Doverlay.h67 unsigned int size; // The size of the overlay, in bytes.
Dcacheasm.h158 .macro cache_index_all cainst, size, linesize, assoc_or1, aa, ab, loopokay, maxofs, awb=a0
161 .set .Lindices, (\size / (\linesize * \assoc_or1))
196 movi \aa, (\size / \assoc_or1)
Dcoreasm.h1029 #define _SIZ(x) .size x, . - x
/hal_xtensa-3.5.0/src/hal/
Dsyscache_asm.S80 .size xthal_icache_enable, . - xthal_icache_enable
90 .size xthal_dcache_enable, . - xthal_dcache_enable
100 .size xthal_icache_disable, . - xthal_icache_disable
110 .size xthal_dcache_disable, . - xthal_dcache_disable
117 .size xthal_icache_enable_nw, . - xthal_icache_enable_nw
124 .size xthal_dcache_enable_nw, . - xthal_dcache_enable_nw
131 .size xthal_icache_disable_nw, . - xthal_icache_disable_nw
138 .size xthal_dcache_disable_nw, . - xthal_dcache_disable_nw
Dattribute.c168 int xthal_set_region_attribute( void *vaddr, unsigned size, unsigned cattr, unsigned flags ) in xthal_set_region_attribute() argument
173 return xthal_mpu_set_region_attribute(vaddr, size, cattr, cattr, flags); in xthal_set_region_attribute()
176 … return xthal_mpu_set_region_attribute(vaddr, size, cattr & 0xf, (cattr & 0x1ff0) >> 4, flags); in xthal_set_region_attribute()
207 if (size == 0) in xthal_set_region_attribute()
209 end_vaddr = (unsigned)vaddr + size - 1; in xthal_set_region_attribute()
Dclock.S72 .size xthal_get_ccount, . - xthal_get_ccount
107 .size xthal_set_ccompare, . - xthal_set_ccompare
137 .size xthal_get_ccompare, . - xthal_get_ccompare
Dset_region_translate.c397 int xthal_set_region_translation(void* vaddr, void* paddr, unsigned size, in xthal_set_region_translation() argument
414 if (size == 0) in xthal_set_region_translation()
424 end_vaddr = vaddr_a + size - 1; in xthal_set_region_translation()
425 end_paddr = paddr_a + size - 1; in xthal_set_region_translation()
433 && ((size & addr_mask) || (vaddr_a & addr_mask) in xthal_set_region_translation()
Dmp_asm.S97 .size xthal_compare_and_set, . - xthal_compare_and_set
122 .size xthal_get_prid, . - xthal_get_prid
Dmemcopy.S128 .size xthal_bcopy, . - xthal_bcopy
164 .size xthal_memcpy.prefixcode, . - xthal_memcpy.prefixcode
264 .size xthal_memcpy, . - xthal_memcpy
408 .size xthal_copy123, . - xthal_copy123
Ddebug_hndlr.S138 .size xthal_debugexc_defhndlr_nw, . - xthal_debugexc_defhndlr_nw
Dwindowspill_asm.S345 .size xthal_window_spill_nw, . - xthal_window_spill_nw
385 .size xthal_window_spill, . - xthal_window_spill
Dcache_asm.S106 .size xthal_dcache_hugerange_\name, . - xthal_dcache_hugerange_\name
171 .size xthal_icache_hugerange_\name, . - xthal_icache_hugerange_\name
Dmem_ecc_parity.S278 .size xthal_memep_inject_error, . - xthal_memep_inject_error
Dmpu.c1638 int xthal_mpu_set_region_attribute(void* vaddr, unsigned size, int accessRights, int memoryType, un… in xthal_mpu_set_region_attribute() argument
1647 if (size == 0) in xthal_mpu_set_region_attribute()
1650 last = first + size; in xthal_mpu_set_region_attribute()
/hal_xtensa-3.5.0/
Dconfigure3286 array size at least. It's necessary to write '\x00'==0 to get something
4317 array size at least. It's necessary to write '\x00'==0 to get something
Daclocal.m41132 [# The POSIX 1988 'ustar' format is defined with fixed-size fields.