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Searched refs:XCHAL_KIO_CACHED_SIZE (Results 1 – 2 of 2) sorted by relevance

/hal_xtensa-3.5.0/src/hal/
Dmmu.c44 && vaddr <= XCHAL_KIO_CACHED_VADDR + XCHAL_KIO_CACHED_SIZE ) in xthal_static_v2p()
84 && paddr <= XCHAL_KIO_CACHED_PADDR + XCHAL_KIO_CACHED_SIZE ) in xthal_static_p2v()
/hal_xtensa-3.5.0/include/xtensa/config/
Dcore.h922 #define XCHAL_KIO_CACHED_SIZE 0x10000000 /* size in bytes of kio_cached (assumed power of 2!!!) */ macro