MEMCTL_DCWU_MASK (reference) in projects: hal_xtensa-3.5.0

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/hal_xtensa-3.5.0/include/xtensa/
D	corebits.h	`182 #define MEMCTL_DCWU_MASK 0x00001F00 /* Bits 8-12 dcache ways in use */ macro 185 #define MEMCTL_DCWU_CLR_MASK ~(MEMCTL_DCWU_MASK)`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
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