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Searched refs:CACHE_REGION_THRESHOLD (Results 1 – 1 of 1) sorted by relevance

/hal_xtensa-3.5.0/src/hal/
Dmpu.c81 #define CACHE_REGION_THRESHOLD (32 * XCHAL_DCACHE_LINESIZE / XCHAL_MPU_ALIGN) macro
83 #define CACHE_REGION_THRESHOLD 0 macro
673 int write_by_region = length < CACHE_REGION_THRESHOLD; in safe_region()