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Searched refs:memoryType (Results 1 – 2 of 2) sorted by relevance

/hal_xtensa-3.4.0/src/hal/
Dmpu.c649 static void safe_region(xthal_MPU_entry* fg, int ip, unsigned end_of_segment, int memoryType, int w… in safe_region() argument
658 if (memoryType == cmemType) in safe_region()
661 int mt_is_wb = is_writeback(memoryType); in safe_region()
662 int mt_is_ch = is_cacheable(memoryType); in safe_region()
668 int need_flush = wb && (is_writeback(cmemType) && !is_writeback(memoryType)); in safe_region()
669 int need_invalidate = inv && (is_cacheable(cmemType) && !is_cacheable(memoryType)); in safe_region()
760 unsigned last, int memoryType, int accessRights, int wb, int inv) in safe_and_commit_overlaped_regions() argument
772 safe_region(fg, i, end_of_segment, memoryType, wb, inv, &post_inv_all); in safe_and_commit_overlaped_regions()
780 safe_region(fg, i, last, memoryType, wb, inv, &post_inv_all); in safe_and_commit_overlaped_regions()
790 XTHAL_MPU_ENTRY_SET_MEMORY_TYPE(fg[i], memoryType); in safe_and_commit_overlaped_regions()
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/hal_xtensa-3.4.0/include/xtensa/
Dhal.h1229 extern int xthal_is_cacheable(unsigned int memoryType);
1230 extern int xthal_is_writeback(unsigned int memoryType);
1231 extern int xthal_is_device(unsigned int memoryType);
1359 int accessRights, int memoryType, unsigned flags);
1442 #define xthal_is_cached(memoryType) (xthal_is_cacheable((memoryType))) argument