Searched refs:TRNG_CFG0_SMPL_DIV_S (Results 1 – 4 of 4) sorted by relevance
77 …((( ui32ClocksPerSample ) << TRNG_CFG0_SMPL_DIV_S ) & TRNG_CFG0_SMPL_DIV_M … in TRNGConfigure()
79 …((( ui32ClocksPerSample ) << TRNG_CFG0_SMPL_DIV_S ) & TRNG_CFG0_SMPL_DIV_M … in TRNGConfigure()
326 #define TRNG_CFG0_SMPL_DIV_S 8 macro
