1 /****************************************************************************** 2 * Filename: hw_systick_h 3 ****************************************************************************** 4 * Copyright (c) 2021 Texas Instruments Incorporated. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1) Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2) Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * 3) Neither the name of the copyright holder nor the names of its contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 ******************************************************************************/ 32 33 #ifndef __HW_SYSTICK_H__ 34 #define __HW_SYSTICK_H__ 35 36 //***************************************************************************** 37 // 38 // This section defines the register offsets of 39 // SYSTICK component 40 // 41 //***************************************************************************** 42 // SysTick Control and Status Register 43 #define SYSTICK_O_CSR 0x00000000U 44 45 // SysTick Reload Value Register 46 #define SYSTICK_O_RVR 0x00000004U 47 48 // SysTick Current Value Register 49 #define SYSTICK_O_CVR 0x00000008U 50 51 // SysTick Calibration Value Register 52 #define SYSTICK_O_CALIB 0x0000000CU 53 54 //***************************************************************************** 55 // 56 // Register: SYSTICK_O_CSR 57 // 58 //***************************************************************************** 59 // Field: [16] COUNTFLAG 60 // 61 // Returns 1 if timer counted to 0 since last time this was read. Clears on 62 // read by application or debugger. 63 #define SYSTICK_CSR_COUNTFLAG 0x00010000U 64 #define SYSTICK_CSR_COUNTFLAG_M 0x00010000U 65 #define SYSTICK_CSR_COUNTFLAG_S 16U 66 67 // Field: [2] CLKSOURCE 68 // 69 // SysTick clock source. Always reads as one if STCALIB reports NOREF. 70 // 0x0:Systick driven by external reference clock. 71 // 0x1:Systick driven by processor clock 72 #define SYSTICK_CSR_CLKSOURCE 0x00000004U 73 #define SYSTICK_CSR_CLKSOURCE_M 0x00000004U 74 #define SYSTICK_CSR_CLKSOURCE_S 2U 75 76 // Field: [1] TICKINT 77 // 78 // 79 // 0x0:Counting down to zero does not pend the systick handler. software can 80 // use countflag to determine if the systick handler has ever counted to zero. 81 // 0x1:Counting down to zero pends the systick handler. 82 #define SYSTICK_CSR_TICKINT 0x00000002U 83 #define SYSTICK_CSR_TICKINT_M 0x00000002U 84 #define SYSTICK_CSR_TICKINT_S 1U 85 86 // Field: [0] ENABLE 87 // 88 // Enable SysTick counter 89 // 0x0:Counter disabled 90 // 0x1:Counter operates in a multi-shot way. that is, counter loads with the 91 // reload value and then begins counting down. on reaching 0, it sets the 92 // countflag to 1 and optionally pends the systick handler, based on tickint. 93 // it then loads the reload value again, and begins counting. 94 #define SYSTICK_CSR_ENABLE 0x00000001U 95 #define SYSTICK_CSR_ENABLE_M 0x00000001U 96 #define SYSTICK_CSR_ENABLE_S 0U 97 98 //***************************************************************************** 99 // 100 // Register: SYSTICK_O_RVR 101 // 102 //***************************************************************************** 103 // Field: [23:0] RELOAD 104 // 105 // Value to load into the SysTick Current Value Register when the counter 106 // reaches 0. 107 #define SYSTICK_RVR_RELOAD_W 24U 108 #define SYSTICK_RVR_RELOAD_M 0x00FFFFFFU 109 #define SYSTICK_RVR_RELOAD_S 0U 110 111 //***************************************************************************** 112 // 113 // Register: SYSTICK_O_CVR 114 // 115 //***************************************************************************** 116 // Field: [23:0] CURRENT 117 // 118 // Reads return the current value of the SysTick counter. This register is 119 // write-clear. Writing to it with any value clears the register to 0. Clearing 120 // this register also clears the COUNTFLAG bit of the SysTick Control and 121 // Status Register. 122 #define SYSTICK_CVR_CURRENT_W 24U 123 #define SYSTICK_CVR_CURRENT_M 0x00FFFFFFU 124 #define SYSTICK_CVR_CURRENT_S 0U 125 126 //***************************************************************************** 127 // 128 // Register: SYSTICK_O_CALIB 129 // 130 //***************************************************************************** 131 // Field: [31] NOREF 132 // 133 // If reads as 1, the Reference clock is not provided - the CLKSOURCE bit of 134 // the SysTick Control and Status register will be forced to 1 and cannot be 135 // cleared to 0. 136 #define SYSTICK_CALIB_NOREF 0x80000000U 137 #define SYSTICK_CALIB_NOREF_M 0x80000000U 138 #define SYSTICK_CALIB_NOREF_S 31U 139 140 // Field: [30] SKEW 141 // 142 // If reads as 1, the calibration value for 10ms is inexact (due to clock 143 // frequency). 144 #define SYSTICK_CALIB_SKEW 0x40000000U 145 #define SYSTICK_CALIB_SKEW_M 0x40000000U 146 #define SYSTICK_CALIB_SKEW_S 30U 147 148 // Field: [23:0] TENMS 149 // 150 // An optional Reload value to be used for 10ms (100Hz) timing, subject to 151 // system clock skew errors. If the value reads as 0, the calibration value is 152 // not known. 153 #define SYSTICK_CALIB_TENMS_W 24U 154 #define SYSTICK_CALIB_TENMS_M 0x00FFFFFFU 155 #define SYSTICK_CALIB_TENMS_S 0U 156 157 158 #endif // __SYSTICK__ 159
