Searched refs:SYS0_BASE (Results 1 – 5 of 5) sorted by relevance
135 HWREG(SYS0_BASE + SYS0_O_LPCMPCFG) |= SYS0_LPCMPCFG_EN; in LPCMPEnable()147 HWREG(SYS0_BASE + SYS0_O_LPCMPCFG) &= ~SYS0_LPCMPCFG_EN; in LPCMPDisable()163 HWREG(SYS0_BASE + SYS0_O_LPCMPCFG) |= SYS0_LPCMPCFG_EVTEN; in LPCMPEnableEvent()175 HWREG(SYS0_BASE + SYS0_O_LPCMPCFG) &= ~SYS0_LPCMPCFG_EVTEN; in LPCMPDisableEvent()188 HWREG(SYS0_BASE + SYS0_O_LPCMPCFG) &= ~SYS0_LPCMPCFG_EVTIFG; in LPCMPClearEvent()201 HWREG(SYS0_BASE + SYS0_O_LPCMPCFG) |= SYS0_LPCMPCFG_WUENSB; in LPCMPEnableWakeup()214 HWREG(SYS0_BASE + SYS0_O_LPCMPCFG) &= ~SYS0_LPCMPCFG_WUENSB; in LPCMPDisableWakeup()237 lpcmpcfg = HWREG(SYS0_BASE + SYS0_O_LPCMPCFG); in LPCMPSelectNegativeInput()238 …HWREG(SYS0_BASE + SYS0_O_LPCMPCFG) = (lpcmpcfg & ~SYS0_LPCMPCFG_NSEL_M) | (input & SYS0_LPCMPCFG_N… in LPCMPSelectNegativeInput()255 if (HWREG(SYS0_BASE + SYS0_O_LPCMPCFG) & SYS0_LPCMPCFG_COUT_HIGH) in LPCMPIsOutputHigh()[all …]
331 HWREG(SYS0_BASE + SYS0_O_ATESTCFG) = 0x5A000000 | SYS0_ATESTCFG_VR2VA1 | SYS0_ATESTCFG_VR2VA0; in TempDiodeGetTemp()355 HWREG(SYS0_BASE + SYS0_O_TSENSCFG) = SYS0_TSENSCFG_SEL_VALUE; in TempDiodeGetTemp()371 HWREG(SYS0_BASE + SYS0_O_TSENSCFG) = SYS0_TSENSCFG_SEL_GND; in TempDiodeGetTemp()400 HWREG(SYS0_BASE + SYS0_O_ATESTCFG) = 0x5A00000F; in TempDiodeGetTemp()403 HWREG(SYS0_BASE + SYS0_O_TSENSCFG) &= ~SYS0_TSENSCFG_SEL_M; in TempDiodeGetTemp()
382 tmute2_temp = HWREG(SYS0_BASE + SYS0_O_TMUTE2); in ADCSetAdjustmentOffset()394 HWREG(SYS0_BASE + SYS0_O_MUNLOCK) = 0xC5AF6927; in ADCSetAdjustmentOffset()397 HWREG(SYS0_BASE + SYS0_O_TMUTE2) = tmute2_temp; in ADCSetAdjustmentOffset()400 HWREG(SYS0_BASE + SYS0_O_MUNLOCK) = 0; in ADCSetAdjustmentOffset()
75 … return (HWREG(SYS0_BASE + SYS0_O_DEVICEID) & SYS0_DEVICEID_VERSION_M) >> SYS0_DEVICEID_VERSION_S; in ChipInfoGetVersion()
52 #define SYS0_BASE 0x40004000 // SYS0 macro
