Searched refs:SHCSR (Results 1 – 2 of 2) sorted by relevance
310 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in Interrupt_enableInterrupt()316 SCB->SHCSR |= SCB_SHCSR_BUSFAULTENA_Msk; in Interrupt_enableInterrupt()322 SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk; in Interrupt_enableInterrupt()354 SCB->SHCSR &= ~(SCB_SHCSR_MEMFAULTENA_Msk); in Interrupt_disableInterrupt()360 SCB->SHCSR &= ~(SCB_SHCSR_BUSFAULTENA_Msk); in Interrupt_disableInterrupt()366 SCB->SHCSR &= ~(SCB_SHCSR_USGFAULTENA_Msk); in Interrupt_disableInterrupt()405 ulRet = SCB->SHCSR & SCB_SHCSR_MEMFAULTENA_Msk; in Interrupt_isEnabled()411 ulRet = SCB->SHCSR & SCB_SHCSR_BUSFAULTENA_Msk; in Interrupt_isEnabled()417 ulRet = SCB->SHCSR & SCB_SHCSR_USGFAULTENA_Msk; in Interrupt_isEnabled()
369 …__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State … member
