Searched refs:PBE_BLE5_RAM_O_FL2MASK (Results 1 – 2 of 2) sorted by relevance
663 … HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL2MASK) = PBE_BLE5_RAM_FL2MASK_MATCH_M | in RCL_Handler_BLE5_adv()677 … HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL2MASK) = PBE_BLE5_RAM_FL2MASK_MATCH_M | in RCL_Handler_BLE5_adv()685 HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL2MASK) = 0; in RCL_Handler_BLE5_adv()694 HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL2MASK) = 0; in RCL_Handler_BLE5_adv()1319 … HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL2MASK) = PBE_BLE5_RAM_FL2MASK_MATCH_M | in RCL_Handler_BLE5_adv()1333 … HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL2MASK) = PBE_BLE5_RAM_FL2MASK_MATCH_M | in RCL_Handler_BLE5_adv()1341 HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL2MASK) = 0; in RCL_Handler_BLE5_adv()1350 HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL2MASK) = 0; in RCL_Handler_BLE5_adv()2164 HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL2MASK) = 0; in RCL_Handler_BLE5_periodicAdv()2630 … HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL2MASK) = PBE_BLE5_RAM_FL2MASK_MATCH_M | in RCL_Handler_BLE5_scan_init()[all …]
217 #define PBE_BLE5_RAM_O_FL2MASK 0x0000009EU macro
