Searched refs:PBE_BLE5_RAM_O_FL1MASK (Results 1 – 2 of 2) sorted by relevance
618 … HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL1MASK) = PBE_BLE5_RAM_FL1MASK_MATCH_M | in RCL_Handler_BLE5_adv()632 … HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL1MASK) = PBE_BLE5_RAM_FL1MASK_MATCH_M | in RCL_Handler_BLE5_adv()640 HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL1MASK) = 0; in RCL_Handler_BLE5_adv()649 HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL1MASK) = 0; in RCL_Handler_BLE5_adv()1274 … HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL1MASK) = PBE_BLE5_RAM_FL1MASK_MATCH_M | in RCL_Handler_BLE5_adv()1288 … HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL1MASK) = PBE_BLE5_RAM_FL1MASK_MATCH_M | in RCL_Handler_BLE5_adv()1296 HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL1MASK) = 0; in RCL_Handler_BLE5_adv()1305 HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL1MASK) = 0; in RCL_Handler_BLE5_adv()1621 … HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL1MASK) = PBE_BLE5_RAM_FL1MASK_MATCH_M | in RCL_Handler_BLE5_aux_adv()1635 … HWREGH_WRITE_LRF(LRFD_BUFRAM_BASE + PBE_BLE5_RAM_O_FL1MASK) = PBE_BLE5_RAM_FL1MASK_MATCH_M | in RCL_Handler_BLE5_aux_adv()[all …]
211 #define PBE_BLE5_RAM_O_FL1MASK 0x0000009AU macro
