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Searched refs:LRFDRFE_BASE (Results 1 – 7 of 7) sorted by relevance

/hal_ti-latest/simplelink_lpf3/source/ti/drivers/rcl/handlers/
Dadc_noise.c180 HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_MSGBOX) = 0; in RCL_Handler_ADC_Noise_getNoise()
187 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_LNA) = HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_LNA) & (~L… in RCL_Handler_ADC_Noise_getNoise()
188 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_DIVCTL) = HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_DIVCTL)… in RCL_Handler_ADC_Noise_getNoise()
258 HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_INIT) = (1 << LRFDRFE_INIT_TOPSM_S); in RCL_Handler_Adc_Noise_powerUp()
259 HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_ENABLE) = (1 << LRFDRFE_ENABLE_TOPSM_S); in RCL_Handler_Adc_Noise_powerUp()
262 while(HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_MSGBOX) != 4); in RCL_Handler_Adc_Noise_powerUp()
265 HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_MSGBOX) = 0; in RCL_Handler_Adc_Noise_powerUp()
282 HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_MSGBOX) = 0; in RCL_Handler_Adc_Noise_powerDown()
290 HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_MSGBOX) = 0; in RCL_Handler_Adc_Noise_powerDown()
305 HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_PDREQ) = LRFDRFE_PDREQ_TOPSMPDREQ_M; in RCL_Handler_Adc_Noise_powerDown()
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Dgeneric.c299 …if ((txCmd->rfFrequency == 0) && ((HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_SPARE4) & 0x0001) == 0)) in RCL_Handler_Generic_Tx()
445 …if ((txCmd->rfFrequency == 0) && ((HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_SPARE4) & 0x0001) == 0)) in RCL_Handler_Generic_TxRepeat()
640 (HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_SPARE4) & 0x01) != 0) in RCL_Handler_Generic_TxRepeat()
706 …if ((txCmd->rfFrequency == 0) && ((HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_SPARE4) & 0x0001) == 0)) in RCL_Handler_Generic_TxTest()
884 …if ((rxCmd->rfFrequency == 0) && ((HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_SPARE4) & 0x0001) == 0)) in RCL_Handler_Generic_Rx()
1202 …if ((txCmd->rfFrequency == 0) && ((HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_SPARE4) & 0x0001) == 0)) in RCL_Handler_Nesb_Ptx()
1508 …if ((rxCmd->rfFrequency == 0) && ((HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_SPARE4) & 0x0001) == 0)) in RCL_Handler_Nesb_Prx()
Dble_cs.c1036 HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_MOD0) = 0x1824; in RCL_Handler_BLE_CS_preprocessCommand()
1040 HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_SPARE0) = (rxGain == 0) in RCL_Handler_BLE_CS_preprocessCommand()
1082 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_SPARE3) = config->magnConfig[lutId… in RCL_Handler_BLE_CS_preprocessCommand()
1083 HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_RSSIOFFSET) = config->rssioffset; in RCL_Handler_BLE_CS_preprocessCommand()
1784 …uint32_t plldiv0 = (HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_PRE0) & LRFDRFE_PRE0_PLLDIV0_M) >> LRF… in RCL_Handler_BLE_CS()
1789 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_PRE0) = ((12U << LRFDRFE_PRE0_PLLDIV0_S) & LRFDRFE_PRE0_P… in RCL_Handler_BLE_CS()
1955 HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_SPARE0) = pCmd->table->rxGain; in RCL_Handler_BLE_CS_Precal()
Dieee.c1275 …if ((txCmd->rfFrequency == 0) && ((HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_SPARE4) & 0x0001) == 0)) in RCL_Handler_Ieee_TxTest()
Dble5.c5409 …Log_printf(RclCore, Log_ERROR, "Synth error. RFEMSGBOX = %04X", HWREG_READ_LRF(LRFDRFE_BASE + LRFD… in RCL_Handler_BLE5_findPbeErrorEndStatus()
/hal_ti-latest/simplelink_lpf3/source/ti/drivers/rcl/
DLRFCC23X0.c158 HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_RSSI) = LRF_RSSI_INVALID; in LRF_setupRadio()
216 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_PA0) = HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_PA0… in LRF_applyTrim()
218 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_ATSTREFH) = HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_ATS… in LRF_applyTrim()
220 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_LNA) = HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_LNA… in LRF_applyTrim()
221 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_IFAMPRFLDO) = HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_IFA… in LRF_applyTrim()
229 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_DCOLDO0) = HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_DCOLDO… in LRF_applyTrim()
253 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_DCOLDO0) = HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_DCOLDO… in LRF_applyTrim()
256 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_DCOLDO0) = HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_DCO… in LRF_applyTrim()
258 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_IFADCALDO) = HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_IFA… in LRF_applyTrim()
259 …HWREG_WRITE_LRF(LRFDRFE_BASE + LRFDRFE_O_IFADCDLDO) = HWREG_READ_LRF(LRFDRFE_BASE + LRFDRFE_O_IFA… in LRF_applyTrim()
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/hal_ti-latest/simplelink_lpf3/source/ti/devices/cc23x0r5/inc/
Dhw_memmap.h78 #define LRFDRFE_BASE 0x40083000 // LRFDRFE macro