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Searched refs:LRFDDBELL_BASE (Results 1 – 5 of 5) sorted by relevance

/hal_ti-latest/simplelink_lpf3/source/ti/drivers/rcl/hal/cc23x0/
Dhal_cc23x0.c108 dbellIrq = HWREG_READ_LRF(LRFDDBELL_BASE + LRFDDBELL_O_MIS0); in hal_get_command_ifg_reg()
112 HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_ICLR0) = dbellIrq; in hal_get_command_ifg_reg()
121 dbellIrq = HWREG_READ_LRF(LRFDDBELL_BASE + LRFDDBELL_O_MIS1); in hal_get_dispatch_ifg_reg()
123 HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_ICLR1) = dbellIrq; in hal_get_dispatch_ifg_reg()
195 …HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_IMASK0) = HWREG_READ_LRF(LRFDDBELL_BASE + LRFDDBELL_O… in hal_enable_setup_time_irq()
201 HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_ICLR0) = LRFDDBELL_ICLR0_SYSTIM0_M; in hal_setup_setup_time()
203 …HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_IMASK0) = HWREG_READ_LRF(LRFDDBELL_BASE + LRFDDBELL_O… in hal_setup_setup_time()
214 HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_ICLR0) = LRFDDBELL_ICLR0_SYSTIM0_M; in hal_setup_start_time()
216 …HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_IMASK0) = HWREG_READ_LRF(LRFDDBELL_BASE + LRFDDBELL_O… in hal_setup_start_time()
222 HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_ICLR0) = LRFDDBELL_ICLR0_SYSTIM0_M; in hal_setup_hard_stop_time()
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/hal_ti-latest/simplelink_lpf3/source/ti/boards/cc23x0r5/
Dtracer_control.c79 …HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_GPOSEL0) = HWREG_READ_LRF(LRFDDBELL_BASE + LRFDDBELL_… in RCL_Tracer_wakeup()
83 …HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_GPOSEL1) = HWREG_READ_LRF(LRFDDBELL_BASE + LRFDDBELL_… in RCL_Tracer_wakeup()
87 …HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_GPOSEL0) = HWREG_READ_LRF(LRFDDBELL_BASE + LRFDDBELL_… in RCL_Tracer_wakeup()
/hal_ti-latest/simplelink_lpf3/source/ti/devices/cc23x0r5/driverlib/
Dlrfd.c95 HWREG(LRFDDBELL_BASE + LRFDDBELL_O_CLKCTL) = clkctl & ~LRFDDBELL_CLKCTL_BRIDGE_M; in LRFDApplyClockDependencies()
121 HWREG(LRFDDBELL_BASE + LRFDDBELL_O_CLKCTL) = clkctl & ~LRFDDBELL_CLKCTL_BRIDGE_M; in LRFDApplyClockDependencies()
/hal_ti-latest/simplelink_lpf3/source/ti/devices/cc23x0r5/inc/
Dhw_memmap.h71 #define LRFDDBELL_BASE 0x40080000 // LRFDDBELL macro
/hal_ti-latest/simplelink_lpf3/source/ti/drivers/rcl/handlers/
Dble_cs.c621 …HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_ICLR0) = HWREG_READ_LRF(LRFDDBELL_BASE + LRFDDBELL_O_… in RCL_Handler_BLE_CS_configureTxRxFifo()
1811 HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_IMASK0) = in RCL_Handler_BLE_CS()
1812 HWREG_READ_LRF(LRFDDBELL_BASE + LRFDDBELL_O_IMASK0) in RCL_Handler_BLE_CS()
1946 HWREG_WRITE_LRF(LRFDDBELL_BASE + LRFDDBELL_O_IMASK0) in RCL_Handler_BLE_CS_Precal()
1947 = HWREG_READ_LRF(LRFDDBELL_BASE + LRFDDBELL_O_IMASK0) in RCL_Handler_BLE_CS_Precal()