Searched refs:ICSR (Results 1 – 4 of 4) sorted by relevance
309 SCB->ICSR |= SCB_ICSR_NMIPENDSET_Msk; in IntSetPend()314 SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk; in IntSetPend()319 SCB->ICSR |= SCB_ICSR_PENDSTSET_Msk; in IntSetPend()368 SCB->ICSR |= SCB_ICSR_PENDSVCLR_Msk; in IntClearPend()373 SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk; in IntClearPend()
450 SCB->ICSR |= SCB_ICSR_NMIPENDSET_Msk; in Interrupt_pendInterrupt()456 SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk; in Interrupt_pendInterrupt()462 SCB->ICSR |= SCB_ICSR_PENDSTSET_Msk; in Interrupt_pendInterrupt()488 SCB->ICSR |= SCB_ICSR_PENDSVCLR_Msk; in Interrupt_unpendInterrupt()494 SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk; in Interrupt_unpendInterrupt()
249 if ((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0) in HwiP_inISR()267 uint32_t intNum = SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk; in HwiP_inSwi()
358 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
