Searched refs:DDI32RegWrite (Results 1 – 8 of 8) sorted by relevance
| /hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/driverlib/ |
| D | ddi.h | 83 #define DDI32RegWrite NOROM_DDI32RegWrite macro
342 extern void DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val);
421 #undef DDI32RegWrite
422 #define DDI32RegWrite ROM_DDI32RegWrite macro
|
| D | ddi.c | 46 #undef DDI32RegWrite
47 #define DDI32RegWrite NOROM_DDI32RegWrite macro
64 DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI32RegWrite() function
|
| D | setup_rom.c | 231 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_ANABYPASSVAL1, ui32Trim); in SetupAfterColdResetWakeupFromShutDownCfg2()
246 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_ANABYPASSVAL2, in SetupAfterColdResetWakeupFromShutDownCfg2()
251 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_AMPCOMPTH2, ui32Trim); in SetupAfterColdResetWakeupFromShutDownCfg2()
253 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_AMPCOMPTH1, ui32Trim); in SetupAfterColdResetWakeupFromShutDownCfg2()
259 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_AMPCOMPCTL, ui32Trim); in SetupAfterColdResetWakeupFromShutDownCfg2()
279 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_XOSCHFCTL, ui32Trim); in SetupAfterColdResetWakeupFromShutDownCfg2()
313 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_RADCEXTCFG, ui32Trim); in SetupAfterColdResetWakeupFromShutDownCfg2()
|
| D | osc.c | 333 …DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_ANABYPASSVAL1, SetupGetTrimForAnabypassValue1( ccfg_M… in OSC_AdjustXoscHfCapArray()
|
| /hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/ |
| D | ddi.h | 85 #define DDI32RegWrite NOROM_DDI32RegWrite macro
345 extern void DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val);
424 #undef DDI32RegWrite
425 #define DDI32RegWrite ROM_DDI32RegWrite macro
|
| D | ddi.c | 48 #undef DDI32RegWrite
49 #define DDI32RegWrite NOROM_DDI32RegWrite macro
66 DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI32RegWrite() function
|
| D | setup_rom.c | 232 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_ANABYPASSVAL1, ui32Trim); in SetupAfterColdResetWakeupFromShutDownCfg2()
247 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_ANABYPASSVAL2, in SetupAfterColdResetWakeupFromShutDownCfg2()
252 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_AMPCOMPTH2, ui32Trim); in SetupAfterColdResetWakeupFromShutDownCfg2()
254 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_AMPCOMPTH1, ui32Trim); in SetupAfterColdResetWakeupFromShutDownCfg2()
260 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_AMPCOMPCTL, ui32Trim); in SetupAfterColdResetWakeupFromShutDownCfg2()
280 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_XOSCHFCTL, ui32Trim); in SetupAfterColdResetWakeupFromShutDownCfg2()
314 DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_RADCEXTCFG, ui32Trim); in SetupAfterColdResetWakeupFromShutDownCfg2()
|
| D | osc.c | 334 …DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_ANABYPASSVAL1, SetupGetTrimForAnabypassValue1( ccfg_M… in OSC_AdjustXoscHfCapArray()
|
