Searched refs:CLKCTL_CLKENSET0_ADC0 (Results 1 – 3 of 3) sorted by relevance
78 #define CLKCTL_ADC0 CLKCTL_CLKENSET0_ADC0 //!< Configure ADC0 clock enable
102 HWREG(CLKCTL_BASE + CLKCTL_O_CLKENSET0) = CLKCTL_CLKENSET0_ADC0; in enableADC()
554 #define CLKCTL_CLKENSET0_ADC0 0x00004000U macro