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Searched refs:AUX_ANAIF_O_ADCCTL (Results 1 – 4 of 4) sorted by relevance

/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/
Daux_adc.c101 HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 1; // CMD: EN(1) -> FLUSH(3) in AUXADCDisable()
102 HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 0; // CMD: FLUSH(3) -> EN(1) in AUXADCDisable()
108 HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = 0; in AUXADCDisable()
131 …HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_NO_EVENT | AUX_ANAIF_ADCCT… in AUXADCEnableAsync()
135 …HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_MCU_EV | AUX_ANAIF_ADCCTL_… in AUXADCEnableAsync()
171 …HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_NO_EVENT | AUX_ANAIF_ADCCT… in AUXADCEnableSyncNoBugWorkaround()
175 …HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_MCU_EV | AUX_ANAIF_ADCCTL_… in AUXADCEnableSyncNoBugWorkaround()
235 HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 1; // CMD: EN(1) -> FLUSH(3) in AUXADCFlushFifo()
236 HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 0; // CMD: FLUSH(3) -> EN(1) in AUXADCFlushFifo()
/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/driverlib/
Daux_adc.c99 HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 1; // CMD: EN(1) -> FLUSH(3) in AUXADCDisable()
100 HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 0; // CMD: FLUSH(3) -> EN(1) in AUXADCDisable()
106 HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = 0; in AUXADCDisable()
129 …HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_NO_EVENT | AUX_ANAIF_ADCCT… in AUXADCEnableAsync()
133 …HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_MCU_EV | AUX_ANAIF_ADCCTL_… in AUXADCEnableAsync()
169 …HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_NO_EVENT | AUX_ANAIF_ADCCT… in AUXADCEnableSyncNoBugWorkaround()
173 …HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_MCU_EV | AUX_ANAIF_ADCCTL_… in AUXADCEnableSyncNoBugWorkaround()
233 HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 1; // CMD: EN(1) -> FLUSH(3) in AUXADCFlushFifo()
234 HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 0; // CMD: FLUSH(3) -> EN(1) in AUXADCFlushFifo()
/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/inc/
Dhw_aux_anaif.h47 #define AUX_ANAIF_O_ADCCTL 0x00000010 macro
/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/inc/
Dhw_aux_anaif.h47 #define AUX_ANAIF_O_ADCCTL 0x00000010 macro