Searched refs:AON_IOC_BASE (Results 1 – 6 of 6) sorted by relevance
147 HWREG(AON_IOC_BASE + ui32DriveLevel) = ui32DriveStrength; in AONIOCDriveStrengthSet()187 return( HWREG(AON_IOC_BASE + ui32DriveLevel) ); in AONIOCDriveStrengthGet()209 HWREG(AON_IOC_BASE + AON_IOC_O_IOCLATCH) = 0x0; in AONIOCFreezeEnable()230 HWREG(AON_IOC_BASE + AON_IOC_O_IOCLATCH) = AON_IOC_IOCLATCH_EN; in AONIOCFreezeDisable()250 HWREG(AON_IOC_BASE + AON_IOC_O_CLK32KCTL) = AON_IOC_CLK32KCTL_OE_N; in AONIOC32kHzOutputDisable()270 HWREG(AON_IOC_BASE + AON_IOC_O_CLK32KCTL) = 0x0; in AONIOC32kHzOutputEnable()
150 if( ! ( HWREGBITW( AON_IOC_BASE + AON_IOC_O_IOCLATCH, AON_IOC_IOCLATCH_EN_BITN ))) in SetupTrimDevice()
149 HWREG(AON_IOC_BASE + ui32DriveLevel) = ui32DriveStrength; in AONIOCDriveStrengthSet()189 return( HWREG(AON_IOC_BASE + ui32DriveLevel) ); in AONIOCDriveStrengthGet()211 HWREG(AON_IOC_BASE + AON_IOC_O_IOCLATCH) = 0x0; in AONIOCFreezeEnable()232 HWREG(AON_IOC_BASE + AON_IOC_O_IOCLATCH) = AON_IOC_IOCLATCH_EN; in AONIOCFreezeDisable()252 HWREG(AON_IOC_BASE + AON_IOC_O_CLK32KCTL) = AON_IOC_CLK32KCTL_OE_N; in AONIOC32kHzOutputDisable()272 HWREG(AON_IOC_BASE + AON_IOC_O_CLK32KCTL) = 0x0; in AONIOC32kHzOutputEnable()
148 if( ! ( HWREGBITW( AON_IOC_BASE + AON_IOC_O_IOCLATCH, AON_IOC_IOCLATCH_EN_BITN ))) in SetupTrimDevice()
86 #define AON_IOC_BASE 0x40094000 // AON_IOC macro