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Searched refs:ulBase (Results 1 – 17 of 17) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/devices/cc32xx/driverlib/
Duart.c83 UARTBaseValid(unsigned long ulBase) in UARTBaseValid() argument
85 return((ulBase == UARTA0_BASE) || (ulBase == UARTA1_BASE)); in UARTBaseValid()
102 UARTIntNumberGet(unsigned long ulBase) in UARTIntNumberGet() argument
116 if(g_ppulUARTIntMap[ulIdx][0] == ulBase) in UARTIntNumberGet()
149 UARTParityModeSet(unsigned long ulBase, unsigned long ulParity) in UARTParityModeSet() argument
154 ASSERT(UARTBaseValid(ulBase)); in UARTParityModeSet()
164 HWREG(ulBase + UART_O_LCRH) = ((HWREG(ulBase + UART_O_LCRH) & in UARTParityModeSet()
184 UARTParityModeGet(unsigned long ulBase) in UARTParityModeGet() argument
189 ASSERT(UARTBaseValid(ulBase)); in UARTParityModeGet()
194 return(HWREG(ulBase + UART_O_LCRH) & in UARTParityModeGet()
[all …]
Dsdhost.c69 SDHostInit(unsigned long ulBase) in SDHostInit() argument
74 HWREG(ulBase + MMCHS_O_SYSCONFIG) = 0x2; in SDHostInit()
79 while( !(HWREG(ulBase + MMCHS_O_SYSCONFIG) & 0x1) ) in SDHostInit()
87 HWREG(ulBase + MMCHS_O_SYSCTL) |= (1 << 24); in SDHostInit()
92 while( (HWREG(ulBase + MMCHS_O_SYSCTL) & (0x1 << 24)) ) in SDHostInit()
100 HWREG(ulBase + MMCHS_O_CAPA) = (0x7 <<24); in SDHostInit()
105 HWREG(ulBase + MMCHS_O_HCTL) |= 0x7 << 9; in SDHostInit()
110 HWREG(ulBase + MMCHS_O_HCTL) |= 1 << 8; in SDHostInit()
115 while( !(HWREG(ulBase + MMCHS_O_HCTL) & (1<<8)) ) in SDHostInit()
120 HWREG(ulBase + MMCHS_O_CON) |= 1 << 21; in SDHostInit()
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Di2s.c83 static void I2SGBLEnable(unsigned long ulBase, unsigned long ulFlag) in I2SGBLEnable() argument
90 ulReg = HWREG(ulBase + MCASP_O_GBLCTL); in I2SGBLEnable()
100 HWREG(ulBase + MCASP_O_GBLCTL) = ulReg; in I2SGBLEnable()
105 while(HWREG(ulBase + MCASP_O_GBLCTL) != ulReg) in I2SGBLEnable()
128 void I2SEnable(unsigned long ulBase, unsigned long ulMode) in I2SEnable() argument
133 if( HWREG(ulBase + MCASP_O_ACLKXCTL) & 0x20) in I2SEnable()
138 HWREG(ulBase + MCASP_O_PDIR) |= 0x14000000; in I2SEnable()
147 I2SGBLEnable(ulBase, MCASP_GBL_RHCLK); in I2SEnable()
152 I2SGBLEnable(ulBase, MCASP_GBL_RCLK); in I2SEnable()
157 I2SGBLEnable(ulBase, MCASP_GBL_RSER); in I2SEnable()
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Dtimer.c72 TimerBaseValid(unsigned long ulBase) in TimerBaseValid() argument
74 return((ulBase == TIMERA0_BASE) || (ulBase == TIMERA1_BASE) || in TimerBaseValid()
75 (ulBase == TIMERA2_BASE) || (ulBase == TIMERA3_BASE)); in TimerBaseValid()
94 TimerEnable(unsigned long ulBase, unsigned long ulTimer) in TimerEnable() argument
99 ASSERT(TimerBaseValid(ulBase)); in TimerEnable()
106 HWREG(ulBase + TIMER_O_CTL) |= ulTimer & (TIMER_CTL_TAEN | TIMER_CTL_TBEN); in TimerEnable()
123 TimerDisable(unsigned long ulBase, unsigned long ulTimer) in TimerDisable() argument
128 ASSERT(TimerBaseValid(ulBase)); in TimerDisable()
135 HWREG(ulBase + TIMER_O_CTL) &= ~(ulTimer & in TimerDisable()
185 TimerConfigure(unsigned long ulBase, unsigned long ulConfig) in TimerConfigure() argument
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Dwdt.c69 WatchdogRunning(unsigned long ulBase) in WatchdogRunning() argument
74 ASSERT((ulBase == WDT_BASE)); in WatchdogRunning()
79 return(HWREG(ulBase + WDT_O_CTL) & WDT_CTL_INTEN); in WatchdogRunning()
99 WatchdogEnable(unsigned long ulBase) in WatchdogEnable() argument
104 ASSERT((ulBase == WDT_BASE)); in WatchdogEnable()
109 HWREG(ulBase + WDT_O_CTL) |= WDT_CTL_INTEN; in WatchdogEnable()
124 WatchdogLock(unsigned long ulBase) in WatchdogLock() argument
129 ASSERT((ulBase == WDT_BASE)); in WatchdogLock()
135 HWREG(ulBase + WDT_O_LOCK) = WDT_LOCK_LOCKED; in WatchdogLock()
150 WatchdogUnlock(unsigned long ulBase) in WatchdogUnlock() argument
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Dspi.c99 static long SPITransfer8(unsigned long ulBase, unsigned char *ucDout, in SPITransfer8() argument
139 ulReadReg = (ulBase + MCSPI_O_RX0); in SPITransfer8()
140 ulWriteReg = (ulBase + MCSPI_O_TX0); in SPITransfer8()
141 ulStatReg = (ulBase + MCSPI_O_CH0STAT); in SPITransfer8()
148 HWREG( ulBase + MCSPI_O_CH0CONF) |= MCSPI_CH0CONF_FORCE; in SPITransfer8()
194 HWREG( ulBase + MCSPI_O_CH0CONF) &= ~MCSPI_CH0CONF_FORCE; in SPITransfer8()
219 static long SPITransfer16(unsigned long ulBase, unsigned short *usDout, in SPITransfer16() argument
272 ulReadReg = (ulBase + MCSPI_O_RX0); in SPITransfer16()
273 ulWriteReg = (ulBase + MCSPI_O_TX0); in SPITransfer16()
274 ulStatReg = (ulBase + MCSPI_O_CH0STAT); in SPITransfer16()
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Duart.h181 extern void UARTParityModeSet(unsigned long ulBase, unsigned long ulParity);
182 extern unsigned long UARTParityModeGet(unsigned long ulBase);
183 extern void UARTFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel,
185 extern void UARTFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel,
187 extern void UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk,
189 extern void UARTConfigGetExpClk(unsigned long ulBase, unsigned long ulUARTClk,
192 extern void UARTEnable(unsigned long ulBase);
193 extern void UARTDisable(unsigned long ulBase);
194 extern void UARTFIFOEnable(unsigned long ulBase);
195 extern void UARTFIFODisable(unsigned long ulBase);
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Dcamera.c67 void CameraReset(unsigned long ulBase) in CameraReset() argument
72 HWREG(ulBase + CAMERA_O_CC_SYSCONFIG) = CAMERA_CC_SYSCONFIG_SOFT_RESET; in CameraReset()
77 while(!(HWREG(ulBase + CAMERA_O_CC_SYSSTATUS)& in CameraReset()
115 void CameraParamsConfig(unsigned long ulBase, unsigned long ulHSPol, in CameraParamsConfig() argument
123 ulReg = HWREG(ulBase + CAMERA_O_CC_CTRL); in CameraParamsConfig()
139 HWREG(ulBase + CAMERA_O_CC_CTRL)=ulReg; in CameraParamsConfig()
157 void CameraXClkConfig(unsigned long ulBase, unsigned long ulCamClkIn, in CameraXClkConfig() argument
166 ulReg = HWREG(ulBase + CAMERA_O_CC_CTRL_XCLK); in CameraXClkConfig()
190 HWREG(ulBase + CAMERA_O_CC_CTRL_XCLK) = ulReg; in CameraXClkConfig()
212 void CameraXClkSet(unsigned long ulBase, unsigned char bXClkFlags) in CameraXClkSet() argument
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Dspi.h121 extern void SPIEnable(unsigned long ulBase);
122 extern void SPIDisable(unsigned long ulBase);
123 extern void SPIReset(unsigned long ulBase);
124 extern void SPIConfigSetExpClk(unsigned long ulBase,unsigned long ulSPIClk,
127 extern long SPIDataGetNonBlocking(unsigned long ulBase,
129 extern void SPIDataGet(unsigned long ulBase, unsigned long *pulData);
130 extern long SPIDataPutNonBlocking(unsigned long ulBase,
132 extern void SPIDataPut(unsigned long ulBase, unsigned long ulData);
133 extern void SPIFIFOEnable(unsigned long ulBase, unsigned long ulFlags);
134 extern void SPIFIFODisable(unsigned long ulBase, unsigned long ulFlags);
[all …]
Dadc.c67 void ADCEnable(unsigned long ulBase) in ADCEnable() argument
72 HWREG(ulBase + ADC_O_ADC_CTRL) |= 0x1; in ADCEnable()
86 void ADCDisable(unsigned long ulBase) in ADCDisable() argument
91 HWREG(ulBase + ADC_O_ADC_CTRL) &= ~0x1 ; in ADCDisable()
107 void ADCChannelEnable(unsigned long ulBase, unsigned long ulChannel) in ADCChannelEnable() argument
115 HWREG(ulBase + ADC_O_ADC_CH_ENABLE) |= ulCh; in ADCChannelEnable()
130 void ADCChannelDisable(unsigned long ulBase, unsigned long ulChannel) in ADCChannelDisable() argument
138 HWREG(ulBase + ADC_O_ADC_CH_ENABLE) &= ~ulCh; in ADCChannelDisable()
165 void ADCIntRegister(unsigned long ulBase, unsigned long ulChannel, in ADCIntRegister() argument
210 void ADCIntUnregister(unsigned long ulBase, unsigned long ulChannel) in ADCIntUnregister() argument
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Dadc.h82 extern void ADCEnable(unsigned long ulBase);
83 extern void ADCDisable(unsigned long ulBase);
84 extern void ADCChannelEnable(unsigned long ulBase,unsigned long ulChannel);
85 extern void ADCChannelDisable(unsigned long ulBase,unsigned long ulChannel);
86 extern void ADCIntRegister(unsigned long ulBase, unsigned long ulChannel,
88 extern void ADCIntUnregister(unsigned long ulBase, unsigned long ulChannel);
89 extern void ADCIntEnable(unsigned long ulBase, unsigned long ulChannel,
91 extern void ADCIntDisable(unsigned long ulBase, unsigned long ulChannel,
93 extern unsigned long ADCIntStatus(unsigned long ulBase,unsigned long ulChannel);
94 extern void ADCIntClear(unsigned long ulBase, unsigned long ulChannel,
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Dtimer.h161 extern void TimerEnable(unsigned long ulBase, unsigned long ulTimer);
162 extern void TimerDisable(unsigned long ulBase, unsigned long ulTimer);
163 extern void TimerConfigure(unsigned long ulBase, unsigned long ulConfig);
164 extern void TimerControlLevel(unsigned long ulBase, unsigned long ulTimer,
166 extern void TimerControlEvent(unsigned long ulBase, unsigned long ulTimer,
168 extern void TimerControlStall(unsigned long ulBase, unsigned long ulTimer,
170 extern void TimerPrescaleSet(unsigned long ulBase, unsigned long ulTimer,
172 extern unsigned long TimerPrescaleGet(unsigned long ulBase,
174 extern void TimerPrescaleMatchSet(unsigned long ulBase, unsigned long ulTimer,
176 extern unsigned long TimerPrescaleMatchGet(unsigned long ulBase,
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Di2s.h172 extern void I2SEnable(unsigned long ulBase, unsigned long ulMode);
173 extern void I2SDisable(unsigned long ulBase);
175 extern void I2SDataPut(unsigned long ulBase, unsigned long ulDataLine,
177 extern long I2SDataPutNonBlocking(unsigned long ulBase,
180 extern void I2SDataGet(unsigned long ulBase, unsigned long ulDataLine,
182 extern long I2SDataGetNonBlocking(unsigned long ulBase,
185 extern void I2SConfigSetExpClk(unsigned long ulBase, unsigned long ulI2SClk,
188 extern void I2STxFIFOEnable(unsigned long ulBase, unsigned long ulTxLevel,
190 extern void I2STxFIFODisable(unsigned long ulBase);
191 extern void I2SRxFIFOEnable(unsigned long ulBase, unsigned long ulRxLevel,
[all …]
Dwdt.h59 extern tBoolean WatchdogRunning(unsigned long ulBase);
60 extern void WatchdogEnable(unsigned long ulBase);
61 extern void WatchdogLock(unsigned long ulBase);
62 extern void WatchdogUnlock(unsigned long ulBase);
63 extern tBoolean WatchdogLockState(unsigned long ulBase);
64 extern void WatchdogReloadSet(unsigned long ulBase, unsigned long ulLoadVal);
65 extern unsigned long WatchdogReloadGet(unsigned long ulBase);
66 extern unsigned long WatchdogValueGet(unsigned long ulBase);
67 extern void WatchdogIntRegister(unsigned long ulBase, void(*pfnHandler)(void));
68 extern void WatchdogIntUnregister(unsigned long ulBase);
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Dcamera.h103 extern void CameraReset(unsigned long ulBase);
104 extern void CameraParamsConfig(unsigned long ulBase, unsigned long ulHSPol,
106 extern void CameraXClkConfig(unsigned long ulBase, unsigned long ulCamClkIn,
108 extern void CameraXClkSet(unsigned long ulBase, unsigned char bXClkFlags);
109 extern void CameraDMAEnable(unsigned long ulBase);
110 extern void CameraDMADisable(unsigned long ulBase);
111 extern void CameraThresholdSet(unsigned long ulBase, unsigned long ulThreshold);
112 extern void CameraIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
113 extern void CameraIntUnregister(unsigned long ulBase);
114 extern void CameraIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
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Dsdhost.h170 extern void SDHostCmdReset(unsigned long ulBase);
171 extern void SDHostInit(unsigned long ulBase);
172 extern long SDHostCmdSend(unsigned long ulBase,unsigned long ulCmd,
174 extern void SDHostIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
175 extern void SDHostIntUnregister(unsigned long ulBase);
176 extern void SDHostIntEnable(unsigned long ulBase,unsigned long ulIntFlags);
177 extern void SDHostIntDisable(unsigned long ulBase,unsigned long ulIntFlags);
178 extern unsigned long SDHostIntStatus(unsigned long ulBase);
179 extern void SDHostIntClear(unsigned long ulBase,unsigned long ulIntFlags);
180 extern void SDHostCardErrorMaskSet(unsigned long ulBase,
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Drom.h178 ((void (*)(unsigned long ulBase, \
184 ((void (*)(unsigned long ulBase, \
190 ((void (*)(unsigned long ulBase, \
196 ((void (*)(unsigned long ulBase, \
203 ((void (*)(unsigned long ulBase, \
210 ((void (*)(unsigned long ulBase, \
217 ((void (*)(unsigned long ulBase, \
224 ((unsigned long (*)(unsigned long ulBase, \
230 ((void (*)(unsigned long ulBase, \
237 ((unsigned long (*)(unsigned long ulBase, \
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