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Searched refs:WDT_BASE (Results 1 – 6 of 6) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/driverlib/
Dwatchdog.h115 return((HWREG(WDT_BASE + WDT_O_CTL) & WDT_CTL_INTEN) ? true : false); in WatchdogRunning()
137 HWREGBITW(WDT_BASE + WDT_O_CTL, WDT_CTL_INTEN_BITN) = 1; in WatchdogEnable()
158 HWREGBITW(WDT_BASE + WDT_O_CTL, WDT_CTL_RESEN_BITN) = 1; in WatchdogResetEnable()
179 HWREGBITW(WDT_BASE + WDT_O_CTL, WDT_CTL_RESEN_BITN) = 0; in WatchdogResetDisable()
197 HWREG(WDT_BASE + WDT_O_LOCK) = WATCHDOG_LOCK_LOCKED; in WatchdogLock()
214 HWREG(WDT_BASE + WDT_O_LOCK) = WATCHDOG_LOCK_UNLOCK; in WatchdogUnlock()
232 return((HWREG(WDT_BASE + WDT_O_LOCK) == WATCHDOG_LOCK_LOCKED) ? in WatchdogLockState()
259 HWREG(WDT_BASE + WDT_O_LOAD) = ui32LoadVal; in WatchdogReloadSet()
278 return(HWREG(WDT_BASE + WDT_O_LOAD)); in WatchdogReloadGet()
294 return(HWREG(WDT_BASE + WDT_O_VALUE)); in WatchdogValueGet()
[all …]
/hal_ti-3.4.0/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/
Dwatchdog.h117 return((HWREG(WDT_BASE + WDT_O_CTL) & WDT_CTL_INTEN) ? true : false); in WatchdogRunning()
139 HWREGBITW(WDT_BASE + WDT_O_CTL, WDT_CTL_INTEN_BITN) = 1; in WatchdogEnable()
160 HWREGBITW(WDT_BASE + WDT_O_CTL, WDT_CTL_RESEN_BITN) = 1; in WatchdogResetEnable()
181 HWREGBITW(WDT_BASE + WDT_O_CTL, WDT_CTL_RESEN_BITN) = 0; in WatchdogResetDisable()
199 HWREG(WDT_BASE + WDT_O_LOCK) = WATCHDOG_LOCK_LOCKED; in WatchdogLock()
216 HWREG(WDT_BASE + WDT_O_LOCK) = WATCHDOG_LOCK_UNLOCK; in WatchdogUnlock()
234 return((HWREG(WDT_BASE + WDT_O_LOCK) == WATCHDOG_LOCK_LOCKED) ? in WatchdogLockState()
261 HWREG(WDT_BASE + WDT_O_LOAD) = ui32LoadVal; in WatchdogReloadSet()
280 return(HWREG(WDT_BASE + WDT_O_LOAD)); in WatchdogReloadGet()
296 return(HWREG(WDT_BASE + WDT_O_VALUE)); in WatchdogValueGet()
[all …]
/hal_ti-3.4.0/simplelink/source/ti/devices/cc32xx/driverlib/
Dwdt.c74 ASSERT((ulBase == WDT_BASE)); in WatchdogRunning()
104 ASSERT((ulBase == WDT_BASE)); in WatchdogEnable()
129 ASSERT((ulBase == WDT_BASE)); in WatchdogLock()
155 ASSERT((ulBase == WDT_BASE)); in WatchdogUnlock()
181 ASSERT((ulBase == WDT_BASE)); in WatchdogLockState()
216 ASSERT((ulBase == WDT_BASE)); in WatchdogReloadSet()
244 ASSERT((ulBase == WDT_BASE)); in WatchdogReloadGet()
269 ASSERT((ulBase == WDT_BASE)); in WatchdogValueGet()
307 ASSERT((ulBase == WDT_BASE)); in WatchdogIntRegister()
344 ASSERT((ulBase == WDT_BASE)); in WatchdogIntUnregister()
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/hal_ti-3.4.0/simplelink/source/ti/devices/cc32xx/inc/
Dhw_memmap.h45 #define WDT_BASE 0x40000000 macro
/hal_ti-3.4.0/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/inc/
Dhw_memmap.h76 #define WDT_BASE 0x40080000 // WDT macro
/hal_ti-3.4.0/simplelink/source/ti/devices/cc13x2_cc26x2/inc/
Dhw_memmap.h76 #define WDT_BASE 0x40080000 // WDT macro