Searched refs:UDMA_BASE (Results 1 – 4 of 4) sorted by relevance
74 HWREG(UDMA_BASE + UDMA_O_CFG) = UDMA_CFG_MASTEN; in uDMAEnable()93 HWREG(UDMA_BASE + UDMA_O_CFG) = 0; in uDMADisable()113 return(HWREG(UDMA_BASE + UDMA_O_ERRCLR)); in uDMAErrorStatusGet()133 HWREG(UDMA_BASE + UDMA_O_ERRCLR) = 1; in uDMAErrorStatusClear()164 HWREG(UDMA_BASE + UDMA_O_ENASET) = 1 << (ulChannelNum & 0x1f); in uDMAChannelEnable()191 HWREG(UDMA_BASE + UDMA_O_ENACLR) = 1 << (ulChannelNum & 0x1f); in uDMAChannelDisable()219 return((HWREG(UDMA_BASE + UDMA_O_ENASET) & in uDMAChannelIsEnabled()256 HWREG(UDMA_BASE + UDMA_O_CTLBASE) = (unsigned long)pControlTable; in uDMAControlBaseSet()277 return((void *)HWREG(UDMA_BASE + UDMA_O_CTLBASE)); in uDMAControlBaseGet()298 return((void *)HWREG(UDMA_BASE + UDMA_O_ALTBASE)); in uDMAControlAlternateBaseGet()[all …]
62 #define UDMA_BASE 0x400FF000 macro
222 if (!(HWREG(UDMA_BASE + UDMA_O_CHMAP3) & UDMA_CHMAP3_CH30SEL_M)) { in configDMA()225 if (!(HWREG(UDMA_BASE + UDMA_O_CHMAP3) & UDMA_CHMAP3_CH31SEL_M)) { in configDMA()
1053 if (!(HWREG(UDMA_BASE + UDMA_O_CHMAP2) & UDMA_CHMAP2_CH23SEL_M)) { in initHw()1056 if (!(HWREG(UDMA_BASE + UDMA_O_CHMAP3) & UDMA_CHMAP3_CH24SEL_M)) { in initHw()
