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Searched refs:SHAMD5_BASE (Results 1 – 3 of 3) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/devices/cc32xx/driverlib/
Dshamd5.c77 ASSERT(ui32Base == SHAMD5_BASE); in SHAMD5DMAEnable()
103 ASSERT(ui32Base == SHAMD5_BASE); in SHAMD5DMADisable()
141 ASSERT(ui32Base == SHAMD5_BASE); in SHAMD5IntStatus()
188 ASSERT(ui32Base == SHAMD5_BASE); in SHAMD5IntEnable()
231 ASSERT(ui32Base == SHAMD5_BASE); in SHAMD5IntDisable()
277 ASSERT(ui32Base == SHAMD5_BASE); in SHAMD5IntClear()
320 ASSERT(ui32Base == SHAMD5_BASE); in SHAMD5IntRegister()
354 ASSERT(ui32Base == SHAMD5_BASE); in SHAMD5IntUnregister()
389 ASSERT(ui32Base == SHAMD5_BASE); in SHAMD5DataLengthSet()
426 ASSERT(ui32Base == SHAMD5_BASE); in SHAMD5ConfigSet()
[all …]
/hal_ti-3.4.0/simplelink/source/ti/drivers/crypto/
DCryptoCC32XX.c478 MAP_SHAMD5IntEnable(SHAMD5_BASE, SHAMD5_INT_CONTEXT_READY | in CryptoCC32XX_shamd5Process()
508 MAP_SHAMD5HMACKeySet(SHAMD5_BASE, pParams->pKey); in CryptoCC32XX_shamd5Process()
509 MAP_SHAMD5ConfigSet(SHAMD5_BASE, cryptoMode, 0, 0, 1, 0); in CryptoCC32XX_shamd5Process()
513 MAP_SHAMD5ConfigSet(SHAMD5_BASE, cryptoMode, 1, 0, 0, 0); in CryptoCC32XX_shamd5Process()
521 MAP_SHAMD5ConfigSet(SHAMD5_BASE, cryptoMode, 0, 0, 0, 0); in CryptoCC32XX_shamd5Process()
523 SHAMD5ResultWrite(SHAMD5_BASE, pParams->innerDigest); in CryptoCC32XX_shamd5Process()
524 SHAMD5WriteDigestCount(SHAMD5_BASE, pParams->digestCount); in CryptoCC32XX_shamd5Process()
534 MAP_SHAMD5HMACKeySet(SHAMD5_BASE, pParams->pKey); in CryptoCC32XX_shamd5Process()
535 MAP_SHAMD5ConfigSet(SHAMD5_BASE, cryptoMode, 0, 1, 1, 1); in CryptoCC32XX_shamd5Process()
539 MAP_SHAMD5ConfigSet(SHAMD5_BASE, cryptoMode, 1, 1, 0, 0); in CryptoCC32XX_shamd5Process()
[all …]
/hal_ti-3.4.0/simplelink/source/ti/devices/cc32xx/inc/
Dhw_memmap.h77 #define SHAMD5_BASE 0x44035000 macro