Searched refs:ARCM_BASE (Results 1 – 4 of 4) sorted by relevance
381 HWREG(ARCM_BASE + PRCM_PeriphRegsList[ulPeripheral].ulClkReg) |= ulClkFlags; in PRCMPeripheralClkEnable()395 HWREG(ARCM_BASE + APPS_RCM_O_CAMERA_CLK_GEN) = 0x0404; in PRCMPeripheralClkEnable()423 HWREG(ARCM_BASE + PRCM_PeriphRegsList[ulPeripheral].ulClkReg) &= ~ulClkFlags; in PRCMPeripheralClkDisable()470 ulHiPulseDiv = ((HWREG(ARCM_BASE + APPS_RCM_O_CAMERA_CLK_GEN) >> 8) & 0x07); in PRCMPeripheralClockGet()471 ulLoPulseDiv = (HWREG(ARCM_BASE + APPS_RCM_O_CAMERA_CLK_GEN) & 0xFF); in PRCMPeripheralClockGet()475 ulHiPulseDiv = ((HWREG(ARCM_BASE + APPS_RCM_O_MMCHS_CLK_GEN) >> 8) & 0x07); in PRCMPeripheralClockGet()476 ulLoPulseDiv = (HWREG(ARCM_BASE + APPS_RCM_O_MMCHS_CLK_GEN) & 0xFF); in PRCMPeripheralClockGet()515 HWREG(ARCM_BASE + PRCM_PeriphRegsList[ulPeripheral].ulRstReg) in PRCMPeripheralReset()527 HWREG(ARCM_BASE+PRCM_PeriphRegsList[ulPeripheral].ulRstReg) in PRCMPeripheralReset()554 ReadyBit = HWREG(ARCM_BASE + PRCM_PeriphRegsList[ulPeripheral].ulRstReg); in PRCMPeripheralStatusGet()[all …]
69 #define ARCM_BASE 0x44025000 macro
534 HWREG(ARCM_BASE + APPS_RCM_O_MCSPI_A2_CLK_GEN) = 0x10303; in Power_setDependency()539 HWREG(ARCM_BASE + APPS_RCM_O_MCSPI_A2_CLK_GEN) = 0x00; in Power_setDependency()1057 HWREG(ARCM_BASE + APPS_RCM_O_MCSPI_S0_CLK_GATING) = 0x0; in PowerCC32XX_shutdownSSPI()1083 HWREG(ARCM_BASE + APPS_RCM_O_MCSPI_S0_CLK_GATING) = 0x1; in PowerCC32XX_shutdownSSPI()
86 #define WAKENWP (ARCM_BASE + APPS_RCM_O_APPS_TO_NWP_WAKE_REQUEST)
