1 /****************************************************************************** 2 * Filename: hw_rfc_rat_h 3 * Revised: 2018-05-14 12:24:52 +0200 (Mon, 14 May 2018) 4 * Revision: 51990 5 * 6 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions are met: 11 * 12 * 1) Redistributions of source code must retain the above copyright notice, 13 * this list of conditions and the following disclaimer. 14 * 15 * 2) Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may 20 * be used to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 * 35 ******************************************************************************/ 36 37 #ifndef __HW_RFC_RAT_H__ 38 #define __HW_RFC_RAT_H__ 39 40 //***************************************************************************** 41 // 42 // This section defines the register offsets of 43 // RFC_RAT component 44 // 45 //***************************************************************************** 46 // Radio Timer Counter Value 47 #define RFC_RAT_O_RATCNT 0x00000004 48 49 // Timer Channel 0 Capture/Compare Register 50 #define RFC_RAT_O_RATCH0VAL 0x00000080 51 52 // Timer Channel 1 Capture/Compare Register 53 #define RFC_RAT_O_RATCH1VAL 0x00000084 54 55 // Timer Channel 2 Capture/Compare Register 56 #define RFC_RAT_O_RATCH2VAL 0x00000088 57 58 // Timer Channel 3 Capture/Compare Register 59 #define RFC_RAT_O_RATCH3VAL 0x0000008C 60 61 // Timer Channel 4 Capture/Compare Register 62 #define RFC_RAT_O_RATCH4VAL 0x00000090 63 64 // Timer Channel 5 Capture/Compare Register 65 #define RFC_RAT_O_RATCH5VAL 0x00000094 66 67 // Timer Channel 6 Capture/Compare Register 68 #define RFC_RAT_O_RATCH6VAL 0x00000098 69 70 // Timer Channel 7 Capture/Compare Register 71 #define RFC_RAT_O_RATCH7VAL 0x0000009C 72 73 //***************************************************************************** 74 // 75 // Register: RFC_RAT_O_RATCNT 76 // 77 //***************************************************************************** 78 // Field: [31:0] CNT 79 // 80 // Counter value. This is not writable while radio timer counter is enabled. 81 #define RFC_RAT_RATCNT_CNT_W 32 82 #define RFC_RAT_RATCNT_CNT_M 0xFFFFFFFF 83 #define RFC_RAT_RATCNT_CNT_S 0 84 85 //***************************************************************************** 86 // 87 // Register: RFC_RAT_O_RATCH0VAL 88 // 89 //***************************************************************************** 90 // Field: [31:0] VAL 91 // 92 // Capture/compare value. Only writable when the channel is configured for 93 // compare mode. In compare mode, a write to this register will auto-arm the 94 // channel. 95 #define RFC_RAT_RATCH0VAL_VAL_W 32 96 #define RFC_RAT_RATCH0VAL_VAL_M 0xFFFFFFFF 97 #define RFC_RAT_RATCH0VAL_VAL_S 0 98 99 //***************************************************************************** 100 // 101 // Register: RFC_RAT_O_RATCH1VAL 102 // 103 //***************************************************************************** 104 // Field: [31:0] VAL 105 // 106 // Capture/compare value. Only writable when the channel is configured for 107 // compare mode. In compare mode, a write to this register will auto-arm the 108 // channel. 109 #define RFC_RAT_RATCH1VAL_VAL_W 32 110 #define RFC_RAT_RATCH1VAL_VAL_M 0xFFFFFFFF 111 #define RFC_RAT_RATCH1VAL_VAL_S 0 112 113 //***************************************************************************** 114 // 115 // Register: RFC_RAT_O_RATCH2VAL 116 // 117 //***************************************************************************** 118 // Field: [31:0] VAL 119 // 120 // Capture/compare value. Only writable when the channel is configured for 121 // compare mode. In compare mode, a write to this register will auto-arm the 122 // channel. 123 #define RFC_RAT_RATCH2VAL_VAL_W 32 124 #define RFC_RAT_RATCH2VAL_VAL_M 0xFFFFFFFF 125 #define RFC_RAT_RATCH2VAL_VAL_S 0 126 127 //***************************************************************************** 128 // 129 // Register: RFC_RAT_O_RATCH3VAL 130 // 131 //***************************************************************************** 132 // Field: [31:0] VAL 133 // 134 // Capture/compare value. Only writable when the channel is configured for 135 // compare mode. In compare mode, a write to this register will auto-arm the 136 // channel. 137 #define RFC_RAT_RATCH3VAL_VAL_W 32 138 #define RFC_RAT_RATCH3VAL_VAL_M 0xFFFFFFFF 139 #define RFC_RAT_RATCH3VAL_VAL_S 0 140 141 //***************************************************************************** 142 // 143 // Register: RFC_RAT_O_RATCH4VAL 144 // 145 //***************************************************************************** 146 // Field: [31:0] VAL 147 // 148 // Capture/compare value. Only writable when the channel is configured for 149 // compare mode. In compare mode, a write to this register will auto-arm the 150 // channel. 151 #define RFC_RAT_RATCH4VAL_VAL_W 32 152 #define RFC_RAT_RATCH4VAL_VAL_M 0xFFFFFFFF 153 #define RFC_RAT_RATCH4VAL_VAL_S 0 154 155 //***************************************************************************** 156 // 157 // Register: RFC_RAT_O_RATCH5VAL 158 // 159 //***************************************************************************** 160 // Field: [31:0] VAL 161 // 162 // Capture/compare value. Only writable when the channel is configured for 163 // compare mode. In compare mode, a write to this register will auto-arm the 164 // channel. 165 #define RFC_RAT_RATCH5VAL_VAL_W 32 166 #define RFC_RAT_RATCH5VAL_VAL_M 0xFFFFFFFF 167 #define RFC_RAT_RATCH5VAL_VAL_S 0 168 169 //***************************************************************************** 170 // 171 // Register: RFC_RAT_O_RATCH6VAL 172 // 173 //***************************************************************************** 174 // Field: [31:0] VAL 175 // 176 // Capture/compare value. Only writable when the channel is configured for 177 // compare mode. In compare mode, a write to this register will auto-arm the 178 // channel. 179 #define RFC_RAT_RATCH6VAL_VAL_W 32 180 #define RFC_RAT_RATCH6VAL_VAL_M 0xFFFFFFFF 181 #define RFC_RAT_RATCH6VAL_VAL_S 0 182 183 //***************************************************************************** 184 // 185 // Register: RFC_RAT_O_RATCH7VAL 186 // 187 //***************************************************************************** 188 // Field: [31:0] VAL 189 // 190 // Capture/compare value. Only writable when the channel is configured for 191 // compare mode. In compare mode, a write to this register will auto-arm the 192 // channel. 193 #define RFC_RAT_RATCH7VAL_VAL_W 32 194 #define RFC_RAT_RATCH7VAL_VAL_M 0xFFFFFFFF 195 #define RFC_RAT_RATCH7VAL_VAL_S 0 196 197 198 #endif // __RFC_RAT__ 199
