1 /****************************************************************************** 2 * Filename: hw_ints_h 3 * Revised: 2018-05-14 12:24:52 +0200 (Mon, 14 May 2018) 4 * Revision: 51990 5 * 6 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions are met: 11 * 12 * 1) Redistributions of source code must retain the above copyright notice, 13 * this list of conditions and the following disclaimer. 14 * 15 * 2) Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may 20 * be used to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 * 35 ******************************************************************************/ 36 37 #ifndef __HW_INTS_H__ 38 #define __HW_INTS_H__ 39 40 //***************************************************************************** 41 // 42 // The following are defines for the interrupt assignments. 43 // 44 //***************************************************************************** 45 #define INT_NMI_FAULT 2 // NMI Fault 46 #define INT_HARD_FAULT 3 // Hard Fault 47 #define INT_MEMMANAGE_FAULT 4 // Memory Management (MemManage) 48 // Fault 49 #define INT_BUS_FAULT 5 // Bus Fault 50 #define INT_USAGE_FAULT 6 // Usage Fault 51 #define INT_SVCALL 11 // Supervisor Call (SVCall) 52 #define INT_DEBUG 12 // Debug Monitor 53 #define INT_PENDSV 14 // Pending Service Call (PendSV) 54 #define INT_SYSTICK 15 // SysTick Interrupt from the 55 // System Timer in NVIC. 56 #define INT_AON_GPIO_EDGE 16 // Edge detect event from IOC 57 #define INT_I2C_IRQ 17 // Interrupt event from I2C 58 #define INT_RFC_CPE_1 18 // Combined Interrupt for CPE 59 // Generated events 60 #define INT_PKA_IRQ 19 // PKA Interrupt event 61 #define INT_AON_RTC_COMB 20 // Event from AON_RTC 62 #define INT_UART0_COMB 21 // UART0 combined interrupt 63 #define INT_AUX_SWEV0 22 // AUX software event 0 64 #define INT_SSI0_COMB 23 // SSI0 combined interrupt 65 #define INT_SSI1_COMB 24 // SSI1 combined interrupt 66 #define INT_RFC_CPE_0 25 // Combined Interrupt for CPE 67 // Generated events 68 #define INT_RFC_HW_COMB 26 // Combined RFC hardware interrupt 69 #define INT_RFC_CMD_ACK 27 // RFC Doorbell Command 70 // Acknowledgement Interrupt 71 #define INT_I2S_IRQ 28 // Interrupt event from I2S 72 #define INT_AUX_SWEV1 29 // AUX software event 1 73 #define INT_WDT_IRQ 30 // Watchdog interrupt event 74 #define INT_GPT0A 31 // GPT0A interrupt event 75 #define INT_GPT0B 32 // GPT0B interrupt event 76 #define INT_GPT1A 33 // GPT1A interrupt event 77 #define INT_GPT1B 34 // GPT1B interrupt event 78 #define INT_GPT2A 35 // GPT2A interrupt event 79 #define INT_GPT2B 36 // GPT2B interrupt event 80 #define INT_GPT3A 37 // GPT3A interrupt event 81 #define INT_GPT3B 38 // GPT3B interrupt event 82 #define INT_CRYPTO_RESULT_AVAIL_IRQ 39 // CRYPTO result available interupt 83 // event 84 #define INT_DMA_DONE_COMB 40 // Combined DMA done 85 #define INT_DMA_ERR 41 // DMA bus error 86 #define INT_FLASH 42 // FLASH controller error event 87 #define INT_SWEV0 43 // Software event 0 88 #define INT_AUX_COMB 44 // AUX combined event 89 #define INT_AON_PROG0 45 // AON programmable event 0 90 #define INT_PROG0 46 // Programmable Interrupt 0 91 #define INT_AUX_COMPA 47 // AUX Compare A event 92 #define INT_AUX_ADC_IRQ 48 // AUX ADC interrupt event 93 #define INT_TRNG_IRQ 49 // TRNG Interrupt event 94 #define INT_OSC_COMB 50 // Combined event from Oscillator 95 // control 96 #define INT_AUX_TIMER2_EV0 51 // AUX Timer2 event 0 97 #define INT_UART1_COMB 52 // UART1 combined interrupt 98 #define INT_BATMON_COMB 53 // Combined event from battery 99 // monitor 100 101 //***************************************************************************** 102 // 103 // The following are defines for number of interrupts and priority levels. 104 // 105 //***************************************************************************** 106 #define NUM_INTERRUPTS 54 // Number of interrupts 107 #define NUM_PRIORITY_BITS 3 // Number of Priority bits 108 #define NUM_PRIORITY 8 // Number of priority levels 109 110 111 //***************************************************************************** 112 // 113 // Aliases for backwards compatibility with Sensor Controller Studio 1.1.0 114 // 115 //***************************************************************************** 116 117 #define INT_AON_AUX_SWEV0 INT_AUX_SWEV0 118 #define INT_AON_AUX_SWEV1 INT_AUX_SWEV1 119 120 #endif 121
