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Searched refs:I2S0_BASE (Results 1 – 3 of 3) sorted by relevance

/hal_ti-2.7.6/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/
Di2s.h275 return(ui32Base == I2S0_BASE); in I2SBaseValid()
330 HWREG(I2S0_BASE + I2S_O_AIFDMACFG) = 0x0; in I2SDisable()
461 HWREG(I2S0_BASE + I2S_O_AIFWCLKSRC) = ui32ClkConfig & in I2SClockConfigure()
678 HWREG(I2S0_BASE + I2S_O_IRQMASK) |= ui32IntFlags; in I2SIntEnable()
710 HWREG(I2S0_BASE + I2S_O_IRQMASK) &= ~ui32IntFlags; in I2SIntDisable()
747 ui32Mask = HWREG(I2S0_BASE + I2S_O_IRQFLAGS); in I2SIntStatus()
748 return(ui32Mask & HWREG(I2S0_BASE + I2S_O_IRQMASK)); in I2SIntStatus()
752 return(HWREG(I2S0_BASE + I2S_O_IRQFLAGS)); in I2SIntStatus()
800 HWREG(I2S0_BASE + I2S_O_IRQCLR) = ui32IntFlags; in I2SIntClear()
824 HWREG(I2S0_BASE + I2S_O_STMPCTL) = I2S_STMPCTL_STMP_EN; in I2SSampleStampEnable()
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Di2s.c91 HWREG(I2S0_BASE + I2S_O_AIFINPTRNEXT) = g_pControlTable->ui32InBase; in I2SEnable()
93 HWREG(I2S0_BASE + I2S_O_AIFOUTPTRNEXT) = g_pControlTable->ui32OutBase; in I2SEnable()
97 HWREG(I2S0_BASE + I2S_O_AIFDMACFG) = (uint32_t)g_pControlTable->ui16DMABufSize - 1; in I2SEnable()
117 … HWREG(I2S0_BASE + I2S_O_AIFFMTCFG) = ui32FmtCfg | (ui32BitClkDelay << I2S_AIFFMTCFG_DATA_DELAY_S); in I2SAudioFormatConfigure()
142 HWREG(I2S0_BASE + I2S_O_AIFDIRCFG) = ( in I2SChannelConfigure()
147 HWREG(I2S0_BASE + I2S_O_AIFWMASK0) = (ui32Chan0Cfg >> 8) & I2S_AIFWMASK0_MASK_M; in I2SChannelConfigure()
148 HWREG(I2S0_BASE + I2S_O_AIFWMASK1) = (ui32Chan1Cfg >> 8) & I2S_AIFWMASK1_MASK_M; in I2SChannelConfigure()
243 HWREG(I2S0_BASE + I2S_O_AIFINPTRNEXT) = (uint32_t)pNextPointer; in I2SPointerSet()
247 HWREG(I2S0_BASE + I2S_O_AIFOUTPTRNEXT) = (uint32_t)pNextPointer; in I2SPointerSet()
273 HWREG(I2S0_BASE + I2S_O_AIFINPTRNEXT) = g_pControlTable->ui32InOffset + in I2SPointerUpdate()
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/hal_ti-2.7.6/simplelink/source/ti/devices/cc13x2_cc26x2/inc/
Dhw_memmap.h62 #define I2S0_BASE 0x40021000 // I2S macro