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Searched refs:CPU_SCS_BASE (Results 1 – 2 of 2) sorted by relevance

/hal_ti-2.7.6/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/
Dcpu.h398 HWREGBITW( CPU_SCS_BASE + CPU_SCS_O_ACTLR, CPU_SCS_ACTLR_DISDEFWBUF_BITN ) = 1; in CPU_WriteBufferDisable()
416 HWREGBITW( CPU_SCS_BASE + CPU_SCS_O_ACTLR, CPU_SCS_ACTLR_DISDEFWBUF_BITN ) = 0; in CPU_WriteBufferEnable()
/hal_ti-2.7.6/simplelink/source/ti/devices/cc13x2_cc26x2/inc/
Dhw_memmap.h175 #define CPU_SCS_BASE 0xE000E000 // CPU_SCS macro