1 /****************************************************************************** 2 * Filename: hw_adi_4_aux_h 3 * Revised: 2018-05-14 12:24:52 +0200 (Mon, 14 May 2018) 4 * Revision: 51990 5 * 6 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions are met: 11 * 12 * 1) Redistributions of source code must retain the above copyright notice, 13 * this list of conditions and the following disclaimer. 14 * 15 * 2) Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may 20 * be used to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 * 35 ******************************************************************************/ 36 37 #ifndef __HW_ADI_4_AUX_H__ 38 #define __HW_ADI_4_AUX_H__ 39 40 //***************************************************************************** 41 // 42 // This section defines the register offsets of 43 // ADI_4_AUX component 44 // 45 //***************************************************************************** 46 // Internal 47 #define ADI_4_AUX_O_MUX0 0x00000000 48 49 // Internal 50 #define ADI_4_AUX_O_MUX1 0x00000001 51 52 // Internal 53 #define ADI_4_AUX_O_MUX2 0x00000002 54 55 // Internal 56 #define ADI_4_AUX_O_MUX3 0x00000003 57 58 // Current Source 59 #define ADI_4_AUX_O_ISRC 0x00000004 60 61 // Comparator 62 #define ADI_4_AUX_O_COMP 0x00000005 63 64 // Internal 65 #define ADI_4_AUX_O_MUX4 0x00000007 66 67 // ADC Control 0 68 #define ADI_4_AUX_O_ADC0 0x00000008 69 70 // ADC Control 1 71 #define ADI_4_AUX_O_ADC1 0x00000009 72 73 // ADC Reference 0 74 #define ADI_4_AUX_O_ADCREF0 0x0000000A 75 76 // ADC Reference 1 77 #define ADI_4_AUX_O_ADCREF1 0x0000000B 78 79 // Internal 80 #define ADI_4_AUX_O_LPMBIAS 0x0000000E 81 82 //***************************************************************************** 83 // 84 // Register: ADI_4_AUX_O_MUX0 85 // 86 //***************************************************************************** 87 // Field: [6] ADCCOMPB_IN 88 // 89 // Internal. Only to be used through TI provided API. 90 // ENUMs: 91 // VDDR_1P8V Internal. Only to be used through TI provided API. 92 // NC Internal. Only to be used through TI provided API. 93 #define ADI_4_AUX_MUX0_ADCCOMPB_IN 0x00000040 94 #define ADI_4_AUX_MUX0_ADCCOMPB_IN_M 0x00000040 95 #define ADI_4_AUX_MUX0_ADCCOMPB_IN_S 6 96 #define ADI_4_AUX_MUX0_ADCCOMPB_IN_VDDR_1P8V 0x00000040 97 #define ADI_4_AUX_MUX0_ADCCOMPB_IN_NC 0x00000000 98 99 // Field: [3:0] COMPA_REF 100 // 101 // Internal. Only to be used through TI provided API. 102 // ENUMs: 103 // ADCVREFP Internal. Only to be used through TI provided API. 104 // VDDS Internal. Only to be used through TI provided API. 105 // VSS Internal. Only to be used through TI provided API. 106 // DCOUPL Internal. Only to be used through TI provided API. 107 // NC Internal. Only to be used through TI provided API. 108 #define ADI_4_AUX_MUX0_COMPA_REF_W 4 109 #define ADI_4_AUX_MUX0_COMPA_REF_M 0x0000000F 110 #define ADI_4_AUX_MUX0_COMPA_REF_S 0 111 #define ADI_4_AUX_MUX0_COMPA_REF_ADCVREFP 0x00000008 112 #define ADI_4_AUX_MUX0_COMPA_REF_VDDS 0x00000004 113 #define ADI_4_AUX_MUX0_COMPA_REF_VSS 0x00000002 114 #define ADI_4_AUX_MUX0_COMPA_REF_DCOUPL 0x00000001 115 #define ADI_4_AUX_MUX0_COMPA_REF_NC 0x00000000 116 117 //***************************************************************************** 118 // 119 // Register: ADI_4_AUX_O_MUX1 120 // 121 //***************************************************************************** 122 // Field: [7:0] COMPA_IN 123 // 124 // Internal. Only to be used through TI provided API. 125 // ENUMs: 126 // AUXIO19 Internal. Only to be used through TI provided API. 127 // AUXIO20 Internal. Only to be used through TI provided API. 128 // AUXIO21 Internal. Only to be used through TI provided API. 129 // AUXIO22 Internal. Only to be used through TI provided API. 130 // AUXIO23 Internal. Only to be used through TI provided API. 131 // AUXIO24 Internal. Only to be used through TI provided API. 132 // AUXIO25 Internal. Only to be used through TI provided API. 133 // AUXIO26 Internal. Only to be used through TI provided API. 134 // NC Internal. Only to be used through TI provided API. 135 #define ADI_4_AUX_MUX1_COMPA_IN_W 8 136 #define ADI_4_AUX_MUX1_COMPA_IN_M 0x000000FF 137 #define ADI_4_AUX_MUX1_COMPA_IN_S 0 138 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO19 0x00000080 139 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO20 0x00000040 140 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO21 0x00000020 141 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO22 0x00000010 142 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO23 0x00000008 143 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO24 0x00000004 144 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO25 0x00000002 145 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO26 0x00000001 146 #define ADI_4_AUX_MUX1_COMPA_IN_NC 0x00000000 147 148 //***************************************************************************** 149 // 150 // Register: ADI_4_AUX_O_MUX2 151 // 152 //***************************************************************************** 153 // Field: [7:3] ADCCOMPB_IN 154 // 155 // Internal. Only to be used through TI provided API. 156 // ENUMs: 157 // VDDS Internal. Only to be used through TI provided API. 158 // VSS Internal. Only to be used through TI provided API. 159 // DCOUPL Internal. Only to be used through TI provided API. 160 // ATEST1 Internal. Only to be used through TI provided API. 161 // ATEST0 Internal. Only to be used through TI provided API. 162 // NC Internal. Only to be used through TI provided API. 163 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_W 5 164 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_M 0x000000F8 165 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_S 3 166 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_VDDS 0x00000080 167 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_VSS 0x00000040 168 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_DCOUPL 0x00000020 169 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_ATEST1 0x00000010 170 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_ATEST0 0x00000008 171 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_NC 0x00000000 172 173 // Field: [2:0] DAC_VREF_SEL 174 // 175 // Internal. Only to be used through TI provided API. 176 // ENUMs: 177 // VDDS Internal. Only to be used through TI provided API. 178 // ADCREF Internal. Only to be used through TI provided API. 179 // DCOUPL Internal. Only to be used through TI provided API. 180 // NC Internal. Only to be used through TI provided API. 181 #define ADI_4_AUX_MUX2_DAC_VREF_SEL_W 3 182 #define ADI_4_AUX_MUX2_DAC_VREF_SEL_M 0x00000007 183 #define ADI_4_AUX_MUX2_DAC_VREF_SEL_S 0 184 #define ADI_4_AUX_MUX2_DAC_VREF_SEL_VDDS 0x00000004 185 #define ADI_4_AUX_MUX2_DAC_VREF_SEL_ADCREF 0x00000002 186 #define ADI_4_AUX_MUX2_DAC_VREF_SEL_DCOUPL 0x00000001 187 #define ADI_4_AUX_MUX2_DAC_VREF_SEL_NC 0x00000000 188 189 //***************************************************************************** 190 // 191 // Register: ADI_4_AUX_O_MUX3 192 // 193 //***************************************************************************** 194 // Field: [7:0] ADCCOMPB_IN 195 // 196 // Internal. Only to be used through TI provided API. 197 // ENUMs: 198 // AUXIO19 Internal. Only to be used through TI provided API. 199 // AUXIO20 Internal. Only to be used through TI provided API. 200 // AUXIO21 Internal. Only to be used through TI provided API. 201 // AUXIO22 Internal. Only to be used through TI provided API. 202 // AUXIO23 Internal. Only to be used through TI provided API. 203 // AUXIO24 Internal. Only to be used through TI provided API. 204 // AUXIO25 Internal. Only to be used through TI provided API. 205 // AUXIO26 Internal. Only to be used through TI provided API. 206 // NC Internal. Only to be used through TI provided API. 207 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_W 8 208 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_M 0x000000FF 209 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_S 0 210 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO19 0x00000080 211 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO20 0x00000040 212 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO21 0x00000020 213 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO22 0x00000010 214 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO23 0x00000008 215 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO24 0x00000004 216 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO25 0x00000002 217 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO26 0x00000001 218 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_NC 0x00000000 219 220 //***************************************************************************** 221 // 222 // Register: ADI_4_AUX_O_ISRC 223 // 224 //***************************************************************************** 225 // Field: [7:2] TRIM 226 // 227 // Adjust current from current source. 228 // 229 // Output currents may be combined to get desired total current. 230 // ENUMs: 231 // 11P75U 11.75 uA 232 // 4P5U 4.5 uA 233 // 2P0U 2.0 uA 234 // 1P0U 1.0 uA 235 // 0P5U 0.5 uA 236 // 0P25U 0.25 uA 237 // NC No current connected 238 #define ADI_4_AUX_ISRC_TRIM_W 6 239 #define ADI_4_AUX_ISRC_TRIM_M 0x000000FC 240 #define ADI_4_AUX_ISRC_TRIM_S 2 241 #define ADI_4_AUX_ISRC_TRIM_11P75U 0x00000080 242 #define ADI_4_AUX_ISRC_TRIM_4P5U 0x00000040 243 #define ADI_4_AUX_ISRC_TRIM_2P0U 0x00000020 244 #define ADI_4_AUX_ISRC_TRIM_1P0U 0x00000010 245 #define ADI_4_AUX_ISRC_TRIM_0P5U 0x00000008 246 #define ADI_4_AUX_ISRC_TRIM_0P25U 0x00000004 247 #define ADI_4_AUX_ISRC_TRIM_NC 0x00000000 248 249 // Field: [0] EN 250 // 251 // Current source enable 252 #define ADI_4_AUX_ISRC_EN 0x00000001 253 #define ADI_4_AUX_ISRC_EN_M 0x00000001 254 #define ADI_4_AUX_ISRC_EN_S 0 255 256 //***************************************************************************** 257 // 258 // Register: ADI_4_AUX_O_COMP 259 // 260 //***************************************************************************** 261 // Field: [7] COMPA_REF_RES_EN 262 // 263 // Enables 400kohm resistance from COMPA reference node to ground. Used with 264 // COMPA_REF_CURR_EN to generate voltage reference for cap-sense. 265 #define ADI_4_AUX_COMP_COMPA_REF_RES_EN 0x00000080 266 #define ADI_4_AUX_COMP_COMPA_REF_RES_EN_M 0x00000080 267 #define ADI_4_AUX_COMP_COMPA_REF_RES_EN_S 7 268 269 // Field: [6] COMPA_REF_CURR_EN 270 // 271 // Enables 2uA IPTAT current from ISRC to COMPA reference node. Requires 272 // ISRC.EN = 1. Used with COMPA_REF_RES_EN to generate voltage reference for 273 // cap-sense. 274 #define ADI_4_AUX_COMP_COMPA_REF_CURR_EN 0x00000040 275 #define ADI_4_AUX_COMP_COMPA_REF_CURR_EN_M 0x00000040 276 #define ADI_4_AUX_COMP_COMPA_REF_CURR_EN_S 6 277 278 // Field: [5:3] LPM_BIAS_WIDTH_TRIM 279 // 280 // Internal. Only to be used through TI provided API. 281 #define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_W 3 282 #define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_M 0x00000038 283 #define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_S 3 284 285 // Field: [2] COMPB_EN 286 // 287 // COMPB enable 288 #define ADI_4_AUX_COMP_COMPB_EN 0x00000004 289 #define ADI_4_AUX_COMP_COMPB_EN_M 0x00000004 290 #define ADI_4_AUX_COMP_COMPB_EN_S 2 291 292 // Field: [0] COMPA_EN 293 // 294 // COMPA enable 295 #define ADI_4_AUX_COMP_COMPA_EN 0x00000001 296 #define ADI_4_AUX_COMP_COMPA_EN_M 0x00000001 297 #define ADI_4_AUX_COMP_COMPA_EN_S 0 298 299 //***************************************************************************** 300 // 301 // Register: ADI_4_AUX_O_MUX4 302 // 303 //***************************************************************************** 304 // Field: [7:0] COMPA_REF 305 // 306 // Internal. Only to be used through TI provided API. 307 // ENUMs: 308 // AUXIO19 Internal. Only to be used through TI provided API. 309 // AUXIO20 Internal. Only to be used through TI provided API. 310 // AUXIO21 Internal. Only to be used through TI provided API. 311 // AUXIO22 Internal. Only to be used through TI provided API. 312 // AUXIO23 Internal. Only to be used through TI provided API. 313 // AUXIO24 Internal. Only to be used through TI provided API. 314 // AUXIO25 Internal. Only to be used through TI provided API. 315 // AUXIO26 Internal. Only to be used through TI provided API. 316 // NC Internal. Only to be used through TI provided API. 317 #define ADI_4_AUX_MUX4_COMPA_REF_W 8 318 #define ADI_4_AUX_MUX4_COMPA_REF_M 0x000000FF 319 #define ADI_4_AUX_MUX4_COMPA_REF_S 0 320 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO19 0x00000080 321 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO20 0x00000040 322 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO21 0x00000020 323 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO22 0x00000010 324 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO23 0x00000008 325 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO24 0x00000004 326 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO25 0x00000002 327 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO26 0x00000001 328 #define ADI_4_AUX_MUX4_COMPA_REF_NC 0x00000000 329 330 //***************************************************************************** 331 // 332 // Register: ADI_4_AUX_O_ADC0 333 // 334 //***************************************************************************** 335 // Field: [7] SMPL_MODE 336 // 337 // ADC Sampling mode: 338 // 339 // 0: Synchronous mode 340 // 1: Asynchronous mode 341 // 342 // The ADC does a sample-and-hold before conversion. In synchronous mode the 343 // sampling starts when the ADC clock detects a rising edge on the trigger 344 // signal. Jitter/uncertainty will be inferred in the detection if the trigger 345 // signal originates from a domain that is asynchronous to the ADC clock. 346 // SMPL_CYCLE_EXP determines the the duration of sampling. 347 // Conversion starts immediately after sampling ends. 348 // 349 // In asynchronous mode the sampling is continuous when enabled. Sampling ends 350 // and conversion starts immediately with the rising edge of the trigger 351 // signal. Sampling restarts when the conversion has finished. 352 // Asynchronous mode is useful when it is important to avoid jitter in the 353 // sampling instant of an externally driven signal 354 #define ADI_4_AUX_ADC0_SMPL_MODE 0x00000080 355 #define ADI_4_AUX_ADC0_SMPL_MODE_M 0x00000080 356 #define ADI_4_AUX_ADC0_SMPL_MODE_S 7 357 358 // Field: [6:3] SMPL_CYCLE_EXP 359 // 360 // Controls the sampling duration before conversion when the ADC is operated in 361 // synchronous mode (SMPL_MODE = 0). The setting has no effect in asynchronous 362 // mode. The sampling duration is given as 2^(SMPL_CYCLE_EXP + 1) / 6 us. 363 // ENUMs: 364 // 10P9_MS 65536x 6 MHz clock periods = 10.9ms 365 // 5P46_MS 32768x 6 MHz clock periods = 5.46ms 366 // 2P73_MS 16384x 6 MHz clock periods = 2.73ms 367 // 1P37_MS 8192x 6 MHz clock periods = 1.37ms 368 // 682_US 4096x 6 MHz clock periods = 682us 369 // 341_US 2048x 6 MHz clock periods = 341us 370 // 170_US 1024x 6 MHz clock periods = 170us 371 // 85P3_US 512x 6 MHz clock periods = 85.3us 372 // 42P6_US 256x 6 MHz clock periods = 42.6us 373 // 21P3_US 128x 6 MHz clock periods = 21.3us 374 // 10P6_US 64x 6 MHz clock periods = 10.6us 375 // 5P3_US 32x 6 MHz clock periods = 5.3us 376 // 2P7_US 16x 6 MHz clock periods = 2.7us 377 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_W 4 378 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_M 0x00000078 379 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_S 3 380 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_10P9_MS 0x00000078 381 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_5P46_MS 0x00000070 382 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_2P73_MS 0x00000068 383 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_1P37_MS 0x00000060 384 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_682_US 0x00000058 385 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_341_US 0x00000050 386 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_170_US 0x00000048 387 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_85P3_US 0x00000040 388 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_42P6_US 0x00000038 389 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_21P3_US 0x00000030 390 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_10P6_US 0x00000028 391 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_5P3_US 0x00000020 392 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_2P7_US 0x00000018 393 394 // Field: [1] RESET_N 395 // 396 // Reset ADC digital subchip, active low. ADC must be reset every time it is 397 // reconfigured. 398 // 399 // 0: Reset 400 // 1: Normal operation 401 #define ADI_4_AUX_ADC0_RESET_N 0x00000002 402 #define ADI_4_AUX_ADC0_RESET_N_M 0x00000002 403 #define ADI_4_AUX_ADC0_RESET_N_S 1 404 405 // Field: [0] EN 406 // 407 // ADC Enable 408 // 409 // 0: Disable 410 // 1: Enable 411 #define ADI_4_AUX_ADC0_EN 0x00000001 412 #define ADI_4_AUX_ADC0_EN_M 0x00000001 413 #define ADI_4_AUX_ADC0_EN_S 0 414 415 //***************************************************************************** 416 // 417 // Register: ADI_4_AUX_O_ADC1 418 // 419 //***************************************************************************** 420 // Field: [0] SCALE_DIS 421 // 422 // Internal. Only to be used through TI provided API. 423 #define ADI_4_AUX_ADC1_SCALE_DIS 0x00000001 424 #define ADI_4_AUX_ADC1_SCALE_DIS_M 0x00000001 425 #define ADI_4_AUX_ADC1_SCALE_DIS_S 0 426 427 //***************************************************************************** 428 // 429 // Register: ADI_4_AUX_O_ADCREF0 430 // 431 //***************************************************************************** 432 // Field: [6] REF_ON_IDLE 433 // 434 // Enable ADCREF in IDLE state. 435 // 436 // 0: Disabled in IDLE state 437 // 1: Enabled in IDLE state 438 // 439 // Keep ADCREF enabled when ADC0.SMPL_MODE = 0. 440 // Recommendation: Enable ADCREF always when ADC0.SMPL_CYCLE_EXP is less than 441 // 0x6 (21.3us sampling time). 442 #define ADI_4_AUX_ADCREF0_REF_ON_IDLE 0x00000040 443 #define ADI_4_AUX_ADCREF0_REF_ON_IDLE_M 0x00000040 444 #define ADI_4_AUX_ADCREF0_REF_ON_IDLE_S 6 445 446 // Field: [5] IOMUX 447 // 448 // Internal. Only to be used through TI provided API. 449 #define ADI_4_AUX_ADCREF0_IOMUX 0x00000020 450 #define ADI_4_AUX_ADCREF0_IOMUX_M 0x00000020 451 #define ADI_4_AUX_ADCREF0_IOMUX_S 5 452 453 // Field: [4] EXT 454 // 455 // Internal. Only to be used through TI provided API. 456 #define ADI_4_AUX_ADCREF0_EXT 0x00000010 457 #define ADI_4_AUX_ADCREF0_EXT_M 0x00000010 458 #define ADI_4_AUX_ADCREF0_EXT_S 4 459 460 // Field: [3] SRC 461 // 462 // ADC reference source: 463 // 464 // 0: Fixed reference = 4.3V 465 // 1: Relative reference = VDDS 466 #define ADI_4_AUX_ADCREF0_SRC 0x00000008 467 #define ADI_4_AUX_ADCREF0_SRC_M 0x00000008 468 #define ADI_4_AUX_ADCREF0_SRC_S 3 469 470 // Field: [0] EN 471 // 472 // ADC reference module enable: 473 // 474 // 0: ADC reference module powered down 475 // 1: ADC reference module enabled 476 #define ADI_4_AUX_ADCREF0_EN 0x00000001 477 #define ADI_4_AUX_ADCREF0_EN_M 0x00000001 478 #define ADI_4_AUX_ADCREF0_EN_S 0 479 480 //***************************************************************************** 481 // 482 // Register: ADI_4_AUX_O_ADCREF1 483 // 484 //***************************************************************************** 485 // Field: [5:0] VTRIM 486 // 487 // Trim output voltage of ADC fixed reference (64 steps, 2's complement). 488 // Applies only for ADCREF0.SRC = 0. 489 // 490 // Examples: 491 // 0x00 - nominal voltage 1.43V 492 // 0x01 - nominal + 0.4% 1.435V 493 // 0x3F - nominal - 0.4% 1.425V 494 // 0x1F - maximum voltage 1.6V 495 // 0x20 - minimum voltage 1.3V 496 #define ADI_4_AUX_ADCREF1_VTRIM_W 6 497 #define ADI_4_AUX_ADCREF1_VTRIM_M 0x0000003F 498 #define ADI_4_AUX_ADCREF1_VTRIM_S 0 499 500 //***************************************************************************** 501 // 502 // Register: ADI_4_AUX_O_LPMBIAS 503 // 504 //***************************************************************************** 505 // Field: [5:0] LPM_TRIM_IOUT 506 // 507 // Internal. Only to be used through TI provided API. 508 #define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_W 6 509 #define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_M 0x0000003F 510 #define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_S 0 511 512 513 #endif // __ADI_4_AUX__ 514
