1 /* --COPYRIGHT--,BSD 2 * Copyright (c) 2017, Texas Instruments Incorporated 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * * Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * * Neither the name of Texas Instruments Incorporated nor the names of 17 * its contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * --/COPYRIGHT--*/ 32 #ifndef ADC14_H_ 33 #define ADC14_H_ 34 35 //***************************************************************************** 36 // 37 //! 38 //! \addtogroup adc14_api 39 //! @{ 40 // 41 //***************************************************************************** 42 43 //***************************************************************************** 44 // 45 // If building with a C++ compiler, make all of the definitions in this header 46 // have a C binding. 47 // 48 //***************************************************************************** 49 #ifdef __cplusplus 50 extern "C" 51 { 52 #endif 53 54 #include <stdint.h> 55 #include <stdbool.h> 56 #include <ti/devices/msp432p4xx/inc/msp.h> 57 58 //***************************************************************************** 59 // 60 // Control specific variables 61 // 62 //***************************************************************************** 63 64 //***************************************************************************** 65 // 66 //The following are values that can be passed to ADC14_initModule 67 // 68 //***************************************************************************** 69 #define ADC_CLOCKSOURCE_ADCOSC (ADC14_CTL0_SSEL_0) 70 #define ADC_CLOCKSOURCE_SYSOSC (ADC14_CTL0_SSEL_1) 71 #define ADC_CLOCKSOURCE_ACLK (ADC14_CTL0_SSEL_2) 72 #define ADC_CLOCKSOURCE_MCLK (ADC14_CTL0_SSEL_3) 73 #define ADC_CLOCKSOURCE_SMCLK (ADC14_CTL0_SSEL_4) 74 #define ADC_CLOCKSOURCE_HSMCLK (ADC14_CTL0_SSEL_5) 75 76 #define ADC_PREDIVIDER_1 (ADC14_CTL0_PDIV_0) 77 #define ADC_PREDIVIDER_4 (ADC14_CTL0_PDIV_1) 78 #define ADC_PREDIVIDER_32 (ADC14_CTL0_PDIV_2) 79 #define ADC_PREDIVIDER_64 (ADC14_CTL0_PDIV_3) 80 81 #define ADC_DIVIDER_1 (ADC14_CTL0_DIV_0) 82 #define ADC_DIVIDER_2 (ADC14_CTL0_DIV_1) 83 #define ADC_DIVIDER_3 (ADC14_CTL0_DIV_2) 84 #define ADC_DIVIDER_4 (ADC14_CTL0_DIV_3) 85 #define ADC_DIVIDER_5 (ADC14_CTL0_DIV_4) 86 #define ADC_DIVIDER_6 (ADC14_CTL0_DIV_5) 87 #define ADC_DIVIDER_7 (ADC14_CTL0_DIV_6) 88 #define ADC_DIVIDER_8 (ADC14_CTL0_DIV_7) 89 90 #define ADC_MAPINTCH3 (ADC14_CTL1_CH3MAP) 91 #define ADC_MAPINTCH2 (ADC14_CTL1_CH2MAP) 92 #define ADC_MAPINTCH1 (ADC14_CTL1_CH1MAP) 93 #define ADC_MAPINTCH0 (ADC14_CTL1_CH0MAP) 94 #define ADC_TEMPSENSEMAP (ADC14_CTL1_TCMAP) 95 #define ADC_BATTMAP (ADC14_CTL1_BATMAP) 96 #define ADC_NOROUTE 0 97 98 #define ADC_8BIT ADC14_CTL1_RES_0 99 #define ADC_10BIT ADC14_CTL1_RES_1 100 #define ADC_12BIT ADC14_CTL1_RES_2 101 #define ADC_14BIT ADC14_CTL1_RES_3 102 103 #define ADC_TRIGGER_ADCSC ADC14_CTL0_SHS_0 104 #define ADC_TRIGGER_SOURCE1 ADC14_CTL0_SHS_1 105 #define ADC_TRIGGER_SOURCE2 ADC14_CTL0_SHS_2 106 #define ADC_TRIGGER_SOURCE3 ADC14_CTL0_SHS_3 107 #define ADC_TRIGGER_SOURCE4 ADC14_CTL0_SHS_4 108 #define ADC_TRIGGER_SOURCE5 ADC14_CTL0_SHS_5 109 #define ADC_TRIGGER_SOURCE6 ADC14_CTL0_SHS_6 110 #define ADC_TRIGGER_SOURCE7 ADC14_CTL0_SHS_7 111 112 #define ADC_PULSE_WIDTH_4 ADC14_CTL0_SHT1_0 113 #define ADC_PULSE_WIDTH_8 ADC14_CTL0_SHT1_1 114 #define ADC_PULSE_WIDTH_16 ADC14_CTL0_SHT1_2 115 #define ADC_PULSE_WIDTH_32 ADC14_CTL0_SHT1_3 116 #define ADC_PULSE_WIDTH_64 ADC14_CTL0_SHT1_4 117 #define ADC_PULSE_WIDTH_96 ADC14_CTL0_SHT1_5 118 #define ADC_PULSE_WIDTH_128 ADC14_CTL0_SHT1_6 119 #define ADC_PULSE_WIDTH_192 ADC14_CTL0_SHT1_7 120 121 #define ADC_NONDIFFERENTIAL_INPUTS false 122 #define ADC_DIFFERENTIAL_INPUTS true 123 124 #define ADC_MEM0 0x00000001 125 #define ADC_MEM1 0x00000002 126 #define ADC_MEM2 0x00000004 127 #define ADC_MEM3 0x00000008 128 #define ADC_MEM4 0x00000010 129 #define ADC_MEM5 0x00000020 130 #define ADC_MEM6 0x00000040 131 #define ADC_MEM7 0x00000080 132 #define ADC_MEM8 0x00000100 133 #define ADC_MEM9 0x00000200 134 #define ADC_MEM10 0x00000400 135 #define ADC_MEM11 0x00000800 136 #define ADC_MEM12 0x00001000 137 #define ADC_MEM13 0x00002000 138 #define ADC_MEM14 0x00004000 139 #define ADC_MEM15 0x00008000 140 #define ADC_MEM16 0x00010000 141 #define ADC_MEM17 0x00020000 142 #define ADC_MEM18 0x00040000 143 #define ADC_MEM19 0x00080000 144 #define ADC_MEM20 0x00100000 145 #define ADC_MEM21 0x00200000 146 #define ADC_MEM22 0x00400000 147 #define ADC_MEM23 0x00800000 148 #define ADC_MEM24 0x01000000 149 #define ADC_MEM25 0x02000000 150 #define ADC_MEM26 0x04000000 151 #define ADC_MEM27 0x08000000 152 #define ADC_MEM28 0x10000000 153 #define ADC_MEM29 0x20000000 154 #define ADC_MEM30 0x40000000 155 #define ADC_MEM31 0x80000000 156 157 #define ADC_VREFPOS_AVCC_VREFNEG_VSS (ADC14_MCTLN_VRSEL_0) 158 #define ADC_VREFPOS_INTBUF_VREFNEG_VSS (ADC14_MCTLN_VRSEL_1) 159 #define ADC_VREFPOS_EXTPOS_VREFNEG_EXTNEG (ADC14_MCTLN_VRSEL_14) 160 #define ADC_VREFPOS_EXTBUF_VREFNEG_EXTNEG (ADC14_MCTLN_VRSEL_15) 161 162 #define ADC_INPUT_A0 (ADC14_MCTLN_INCH_0) 163 #define ADC_INPUT_A1 (ADC14_MCTLN_INCH_1) 164 #define ADC_INPUT_A2 (ADC14_MCTLN_INCH_2) 165 #define ADC_INPUT_A3 (ADC14_MCTLN_INCH_3) 166 #define ADC_INPUT_A4 (ADC14_MCTLN_INCH_4) 167 #define ADC_INPUT_A5 (ADC14_MCTLN_INCH_5) 168 #define ADC_INPUT_A6 (ADC14_MCTLN_INCH_6) 169 #define ADC_INPUT_A7 (ADC14_MCTLN_INCH_7) 170 #define ADC_INPUT_A8 (ADC14_MCTLN_INCH_8) 171 #define ADC_INPUT_A9 (ADC14_MCTLN_INCH_9) 172 #define ADC_INPUT_A10 (ADC14_MCTLN_INCH_10) 173 #define ADC_INPUT_A11 (ADC14_MCTLN_INCH_11) 174 #define ADC_INPUT_A12 (ADC14_MCTLN_INCH_12) 175 #define ADC_INPUT_A13 (ADC14_MCTLN_INCH_13) 176 #define ADC_INPUT_A14 (ADC14_MCTLN_INCH_14) 177 #define ADC_INPUT_A15 (ADC14_MCTLN_INCH_15) 178 #define ADC_INPUT_A16 (ADC14_MCTLN_INCH_16) 179 #define ADC_INPUT_A17 (ADC14_MCTLN_INCH_17) 180 #define ADC_INPUT_A18 (ADC14_MCTLN_INCH_18) 181 #define ADC_INPUT_A19 (ADC14_MCTLN_INCH_19) 182 #define ADC_INPUT_A20 (ADC14_MCTLN_INCH_20) 183 #define ADC_INPUT_A21 (ADC14_MCTLN_INCH_21) 184 #define ADC_INPUT_A22 (ADC14_MCTLN_INCH_22) 185 #define ADC_INPUT_A23 (ADC14_MCTLN_INCH_23) 186 #define ADC_INPUT_A24 (ADC14_MCTLN_INCH_24) 187 #define ADC_INPUT_A25 (ADC14_MCTLN_INCH_25) 188 #define ADC_INPUT_A26 (ADC14_MCTLN_INCH_26) 189 #define ADC_INPUT_A27 (ADC14_MCTLN_INCH_27) 190 #define ADC_INPUT_A28 (ADC14_MCTLN_INCH_28) 191 #define ADC_INPUT_A29 (ADC14_MCTLN_INCH_29) 192 #define ADC_INPUT_A30 (ADC14_MCTLN_INCH_30) 193 #define ADC_INPUT_A31 (ADC14_MCTLN_INCH_31) 194 195 #define ADC_COMP_WINDOW0 0x00 196 #define ADC_COMP_WINDOW1 0x01 197 198 #define ADC_SIGNED_BINARY 0x00 199 #define ADC_UNSIGNED_BINARY 0x01 200 201 #define ADC_MANUAL_ITERATION 0x00 202 #define ADC_AUTOMATIC_ITERATION ADC14_CTL0_MSC 203 204 #define ADC_UNRESTRICTED_POWER_MODE ADC14_CTL1_PWRMD_0 205 #define ADC_ULTRA_LOW_POWER_MODE ADC14_CTL1_PWRMD_2 206 207 208 #define ADC_INT0 ADC14_IER0_IE0 209 #define ADC_INT1 ADC14_IER0_IE1 210 #define ADC_INT2 ADC14_IER0_IE2 211 #define ADC_INT3 ADC14_IER0_IE3 212 #define ADC_INT4 ADC14_IER0_IE4 213 #define ADC_INT5 ADC14_IER0_IE5 214 #define ADC_INT6 ADC14_IER0_IE6 215 #define ADC_INT7 ADC14_IER0_IE7 216 #define ADC_INT8 ADC14_IER0_IE8 217 #define ADC_INT9 ADC14_IER0_IE9 218 #define ADC_INT10 ADC14_IER0_IE10 219 #define ADC_INT11 ADC14_IER0_IE11 220 #define ADC_INT12 ADC14_IER0_IE12 221 #define ADC_INT13 ADC14_IER0_IE13 222 #define ADC_INT14 ADC14_IER0_IE14 223 #define ADC_INT15 ADC14_IER0_IE15 224 #define ADC_INT16 ADC14_IER0_IE16 225 #define ADC_INT17 ADC14_IER0_IE17 226 #define ADC_INT18 ADC14_IER0_IE18 227 #define ADC_INT19 ADC14_IER0_IE19 228 #define ADC_INT20 ADC14_IER0_IE20 229 #define ADC_INT21 ADC14_IER0_IE21 230 #define ADC_INT22 ADC14_IER0_IE22 231 #define ADC_INT23 ADC14_IER0_IE23 232 #define ADC_INT24 ADC14_IER0_IE24 233 #define ADC_INT25 ADC14_IER0_IE25 234 #define ADC_INT26 ADC14_IER0_IE26 235 #define ADC_INT27 ADC14_IER0_IE27 236 #define ADC_INT28 ADC14_IER0_IE28 237 #define ADC_INT29 ADC14_IER0_IE29 238 #define ADC_INT30 ADC14_IER0_IE30 239 #define ADC_INT31 ADC14_IER0_IE31 240 #define ADC_IN_INT 0x0000000200000000 241 #define ADC_LO_INT 0x0000000400000000 242 #define ADC_HI_INT 0x0000000800000000 243 #define ADC_OV_INT 0x0000001000000000 244 #define ADC_TOV_INT 0x0000002000000000 245 #define ADC_RDY_INT 0x0000004000000000 246 247 #define ADC_INVALID_MEM 32 248 249 //***************************************************************************** 250 // 251 //Prototypes for the APIs. 252 // 253 //***************************************************************************** 254 255 //***************************************************************************** 256 // 257 //! 258 //! Enables the ADC block. 259 //! 260 //! This will enable operation of the ADC block. 261 //! 262 //! \return none. 263 // 264 //***************************************************************************** 265 extern void ADC14_enableModule(void); 266 267 //***************************************************************************** 268 // 269 //! 270 //! Disables the ADC block. 271 //! 272 //! This will disable operation of the ADC block. 273 //! 274 //! \return false if user is trying to disable during active conversion 275 // 276 //***************************************************************************** 277 extern bool ADC14_disableModule(void); 278 279 //***************************************************************************** 280 // 281 //! 282 //! Initializes the ADC module and sets up the clock system divider/pre-divider. 283 //! This initialization function will also configure the internal/external 284 //! signal mapping. 285 //! 286 //! \note A call to this function while active ADC conversion is happening 287 //! is an invalid case and will result in a false value being returned. 288 //! 289 //! \param clockSource The clock source to use for the ADC module. 290 //! - \b ADC_CLOCKSOURCE_ADCOSC [DEFAULT] 291 //! - \b ADC_CLOCKSOURCE_SYSOSC 292 //! - \b ADC_CLOCKSOURCE_ACLK 293 //! - \b ADC_CLOCKSOURCE_MCLK 294 //! - \b ADC_CLOCKSOURCE_SMCLK 295 //! - \b ADC_CLOCKSOURCE_HSMCLK 296 //! 297 //! \param clockPredivider Divides the given clock source before feeding it 298 //! into the main clock divider. 299 //! Valid values are: 300 //! - \b ADC_PREDIVIDER_1 [DEFAULT] 301 //! - \b ADC_PREDIVIDER_4 302 //! - \b ADC_PREDIVIDER_32 303 //! - \b ADC_PREDIVIDER_64 304 //! 305 //! \param clockDivider Divides the pre-divided clock source 306 //! Valid values are 307 //! - \b ADC_DIVIDER_1 [Default value] 308 //! - \b ADC_DIVIDER_2 309 //! - \b ADC_DIVIDER_3 310 //! - \b ADC_DIVIDER_4 311 //! - \b ADC_DIVIDER_5 312 //! - \b ADC_DIVIDER_6 313 //! - \b ADC_DIVIDER_7 314 //! - \b ADC_DIVIDER_8 315 //! 316 //! \param internalChannelMask 317 //! Configures the internal/external pin mappings 318 //! for the ADC modules. This setting determines if the given ADC channel or 319 //! component is mapped to an external pin (default), or routed to an internal 320 //! component. This parameter is a bit mask where a logical high value will 321 //! switch the component to the internal routing. For a list of internal 322 //! routings, please refer to the device specific data sheet. 323 //! Valid values are a logical OR of the following values: 324 //! - \b ADC_MAPINTCH3 325 //! - \b ADC_MAPINTCH2 326 //! - \b ADC_MAPINTCH1 327 //! - \b ADC_MAPINTCH0 328 //! - \b ADC_TEMPSENSEMAP 329 //! - \b ADC_BATTMAP 330 //! - \n ADC_NOROUTE 331 //! If internalChannelMask is not desired, pass ADC_NOROUTE in lieu of this 332 //! parameter. 333 //! 334 //! \return false if the initialization fails due to an in progress conversion 335 //! 336 //! 337 // 338 //***************************************************************************** 339 extern bool ADC14_initModule(uint32_t clockSource, uint32_t clockPredivider, 340 uint32_t clockDivider, uint32_t internalChannelMask); 341 342 //***************************************************************************** 343 // 344 //! 345 //! Sets the resolution of the ADC module. The default resolution is 12-bit, 346 //! however for power consumption concerns this can be limited to a lower 347 //! resolution 348 //! 349 //! \param resolution Resolution of the ADC module 350 //! - \b ADC_8BIT (10 clock cycle conversion time) 351 //! - \b ADC_10BIT (12 clock cycle conversion time) 352 //! - \b ADC_12BIT (14 clock cycle conversion time) 353 //! - \b ADC_14BIT (16 clock cycle conversion time)[DEFAULT] 354 //! 355 //! \return none 356 // 357 //***************************************************************************** 358 extern void ADC14_setResolution(uint32_t resolution); 359 360 //***************************************************************************** 361 // 362 //! 363 //! Gets the resolution of the ADC module. 364 //! 365 //! \return Resolution of the ADC module 366 //! - \b ADC_8BIT (10 clock cycle conversion time) 367 //! - \b ADC_10BIT (12 clock cycle conversion time) 368 //! - \b ADC_12BIT (14 clock cycle conversion time) 369 //! - \b ADC_14BIT (16 clock cycle conversion time) 370 // 371 //***************************************************************************** 372 extern uint_fast32_t ADC14_getResolution(void); 373 374 //***************************************************************************** 375 // 376 //! 377 //! Sets the source for the trigger of the ADC module. By default, this value 378 //! is configured to a software source (the ADCSC bit), however depending on 379 //! the specific device the trigger can be set to different sources (for 380 //! example, a timer output). These sources vary from part to part and the 381 //! user should refer to the device specific datasheet. 382 //! 383 //! \param source Trigger source for sampling. Possible values include: 384 //! - \b ADC_TRIGGER_ADCSC [DEFAULT] 385 //! - \b ADC_TRIGGER_SOURCE1 386 //! - \b ADC_TRIGGER_SOURCE2 387 //! - \b ADC_TRIGGER_SOURCE3 388 //! - \b ADC_TRIGGER_SOURCE4 389 //! - \b ADC_TRIGGER_SOURCE5 390 //! - \b ADC_TRIGGER_SOURCE6 391 //! - \b ADC_TRIGGER_SOURCE7 392 //! \param invertSignal When set to true, will invert the trigger signal to a 393 //! falling edge. When false, will use a rising edge. 394 //! 395 //! \return false if setting fails due to an in progress conversion 396 // 397 //***************************************************************************** 398 extern bool ADC14_setSampleHoldTrigger(uint32_t source, bool invertSignal); 399 400 //***************************************************************************** 401 // 402 //! 403 //! Sets the sample/hold time for the specified memory register range. The 404 //! duration of time required for a sample differs depending on the user's 405 //! hardware configuration. 406 //! 407 //! There are two values in the ADCC module. The first value controls 408 //! ADC memory locations ADC_MEMORY_0 through ADC_MEMORY_7 and 409 //! ADC_MEMORY_24 through ADC_MEMORY_31, while the second value 410 //! controls memory locations ADC_MEMORY_8 through ADC_MEMORY_23. 411 //! 412 //! \param firstPulseWidth Pulse width of the first pulse in ADCCLK cycles 413 //! Possible values must be one of the following: 414 //! - \b ADC_PULSE_WIDTH_4 [DEFAULT] 415 //! - \b ADC_PULSE_WIDTH_8 416 //! - \b ADC_PULSE_WIDTH_16 417 //! - \b ADC_PULSE_WIDTH_32 418 //! - \b ADC_PULSE_WIDTH_64 419 //! - \b ADC_PULSE_WIDTH_96 420 //! - \b ADC_PULSE_WIDTH_128 421 //! - \b ADC_PULSE_WIDTH_192 422 //! \param secondPulseWidth Pulse width of the second pulse in ADCCLK 423 //! cycles. Possible values must be one of the following: 424 //! - \b ADC_PULSE_WIDTH_4 [DEFAULT] 425 //! - \b ADC_PULSE_WIDTH_8 426 //! - \b ADC_PULSE_WIDTH_16 427 //! - \b ADC_PULSE_WIDTH_32 428 //! - \b ADC_PULSE_WIDTH_64 429 //! - \b ADC_PULSE_WIDTH_96 430 //! - \b ADC_PULSE_WIDTH_128 431 //! - \b ADC_PULSE_WIDTH_192 432 //! 433 //! \return false if setting fails due to an in progress conversion 434 // 435 //***************************************************************************** 436 extern bool ADC14_setSampleHoldTime(uint32_t firstPulseWidth, 437 uint32_t secondPulseWidth); 438 439 //***************************************************************************** 440 // 441 //! 442 //! Configures the ADC module to use a multiple memory sample scheme. This 443 //! means that multiple samples will consecutively take place and be stored in 444 //! multiple memory locations. The first sample/conversion will be placed in 445 //! memoryStart, while the last sample will be stored in memoryEnd. 446 //! Each memory location should be configured individually using the 447 //! ADC14_configureConversionMemory function. 448 //! 449 //! The ADC module can be started in "repeat" mode which will cause the 450 //! ADC module to resume sampling once the initial sample/conversion set is 451 //! executed. For multi-sample mode, this means that the sampling of the 452 //! entire memory provided. 453 //! 454 //! \param memoryStart Memory location to store first sample/conversion 455 //! value. Possible values include: 456 //! - \b ADC_MEM0 through \b ADC_MEM31 457 //! \param memoryEnd Memory location to store last sample. 458 //! Possible values include: 459 //! - \b ADC_MEM0 through \b ADC_MEM31 460 //! \param repeatMode Specifies whether or not to repeat the conversion/sample 461 //! cycle after the first round of sample/conversions. Valid values 462 //! are true or false. 463 //! 464 //! \return false if setting fails due to an in progress conversion 465 // 466 //***************************************************************************** 467 extern bool ADC14_configureMultiSequenceMode(uint32_t memoryStart, 468 uint32_t memoryEnd, bool repeatMode); 469 470 //***************************************************************************** 471 // 472 //! 473 //! Configures the ADC module to use a a single ADC memory location for 474 //! sampling/conversion. This is used when only one channel might be needed for 475 //! conversion, or where using a multiple sampling scheme is not important. 476 //! 477 //! The ADC module can be started in "repeat" mode which will cause the 478 //! ADC module to resume sampling once the initial sample/conversion set is 479 //! executed. In single sample mode, this will cause the ADC module to 480 //! continuously sample into the memory destination provided. 481 482 //! \param memoryDestination Memory location to store sample/conversion 483 //! value. Possible values include: 484 //! - \b ADC_MEM0 through \b ADC_MEM31 485 //! 486 //! \param repeatMode Specifies whether or not to repeat the conversion/sample 487 //! cycle after the first round of sample/conversions 488 //! 489 //! \return false if setting fails due to an in progress conversion 490 // 491 //***************************************************************************** 492 extern bool ADC14_configureSingleSampleMode(uint32_t memoryDestination, 493 bool repeatMode); 494 495 //***************************************************************************** 496 // 497 //! 498 //! Enables conversion of ADC data. Note that this only enables conversion. 499 //! To trigger the conversion, you will have to call the 500 //! ADC14_toggleConversionTrigger or use the source trigger configured in 501 //! ADC14_setSampleHoldTrigger. 502 //! 503 //! \return false if setting fails due to an in progress conversion 504 // 505 //***************************************************************************** 506 extern bool ADC14_enableConversion(void); 507 508 //***************************************************************************** 509 // 510 //! 511 //! Halts conversion conversion of the ADC module. Note that the software bit 512 //! for triggering conversions will also be cleared with this function. 513 //! 514 //! If multi-sequence conversion mode was enabled, the position of the last 515 //! completed conversion can be retrieved using ADCLastConversionMemoryGet 516 //! 517 //! \return none 518 // 519 //***************************************************************************** 520 extern void ADC14_disableConversion(void); 521 522 //***************************************************************************** 523 // 524 //! 525 //! Toggles the trigger for conversion of the ADC module by toggling the 526 //! trigger software bit. Note that this will cause the ADC to start 527 //! conversion regardless if the software bit was set as the trigger using 528 //! ADC14_setSampleHoldTrigger. 529 //! 530 //! \return false if setting fails due to an in progress conversion 531 // 532 //***************************************************************************** 533 extern bool ADC14_toggleConversionTrigger(void); 534 535 //***************************************************************************** 536 // 537 //! 538 //! Returns a boolean value that tells if a conversion/sample is in progress 539 //! 540 //! \return true if conversion is active, false otherwise 541 // 542 //***************************************************************************** 543 extern bool ADC14_isBusy(void); 544 545 //***************************************************************************** 546 // 547 //! 548 //! Configures an individual memory location for the ADC module. 549 //! 550 //! \param memorySelect is the individual ADC memory location to 551 //! configure. If multiple memory locations want to be configured with the 552 //! same configuration, this value can be logically ORed together with other 553 //! values. 554 //! - \b ADC_MEM0 through \b ADC_MEM31 555 //! \param refSelect is the voltage reference to use for the selected 556 //! memory spot. Possible values include: 557 //! - \b ADC_VREFPOS_AVCC_VREFNEG_VSS [DEFAULT] 558 //! - \b ADC_VREFPOS_INTBUF_VREFNEG_VSS 559 //! - \b ADC_VREFPOS_EXTPOS_VREFNEG_EXTNEG 560 //! - \b ADC_VREFPOS_EXTBUF_VREFNEG_EXTNEG 561 //! \param channelSelect selects the channel to be used for ADC sampling. 562 //! Note if differential mode is enabled, the value sampled will be 563 //! equal to the difference between the corresponding even/odd memory 564 //! locations. Possible values are: 565 //! - \b ADC_INPUT_A0 through \b ADC_INPUT_A31 566 //! 567 //! \param differntialMode selects if the channel selected by the 568 //! channelSelect will be configured in differential mode. If this 569 //! parameter is given as true, the configured channel will be paired 570 //! with its neighbor in differential mode. for example, if channel A0 or A1 571 //! is selected, the channel configured will be the difference between A0 572 //! and A1. If A2 or A3 are selected, the channel configured will be the 573 //! difference between A2 and A3 (and so on). Users can enter true or false, 574 //! or one of the following values: 575 //! - ADC_NONDIFFERENTIAL_INPUTS 576 //! - ADC_DIFFERENTIAL_INPUTS 577 //! 578 //! 579 //! \return false if setting fails due to an in progress conversion 580 //! 581 // 582 //***************************************************************************** 583 extern bool ADC14_configureConversionMemory(uint32_t memorySelect, 584 uint32_t refSelect, uint32_t channelSelect, bool differntialMode); 585 586 //***************************************************************************** 587 // 588 //! 589 //! Enables the specified mask of memory channels to use the specified 590 //! comparator window. THe ADCC module has two different comparator windows 591 //! that can be set with this function. 592 //! 593 //! \param memorySelect is the mask of memory locations to enable the 594 //! comparator window for. This can be a bitwise OR of the following 595 //! values: 596 //! - \b ADC_MEM0 through \b ADC_MEM31 597 //! \param windowSelect Memory location to store sample/conversion 598 //! value. Possible values include: 599 //! \b ADCOMP_WINDOW0 [DEFAULT] 600 //! \b ADCOMP_WINDOW1 601 //! 602 //! \return false if setting fails due to an in progress conversion 603 // 604 //***************************************************************************** 605 extern bool ADC14_enableComparatorWindow(uint32_t memorySelect, 606 uint32_t windowSelect); 607 608 //***************************************************************************** 609 // 610 //! 611 //! Disables the comparator window on the specified memory channels 612 //! 613 //! \param memorySelect is the mask of memory locations to disable the 614 //! comparator window for. This can be a bitwise OR of the following 615 //! values: 616 //! - \b ADC_MEM0 through \b ADC_MEM31 617 //! 618 //! \return false if setting fails due to an in progress conversion 619 // 620 //***************************************************************************** 621 extern bool ADC14_disableComparatorWindow(uint32_t memorySelect); 622 623 //***************************************************************************** 624 // 625 //! 626 //! Sets the lower and upper limits of the specified window comparator. Note 627 //! that this function will truncate values based of the resolution/data 628 //! format configured. If the ADC is operating in 10-bit mode, and a 12-bit 629 //! value is passed into this function the most significant 2 bits will be 630 //! truncated. 631 //! 632 //! The parameters provided to this function for the upper and lower threshold 633 //! depend on the current resolution for the ADC. For example, if configured 634 //! in 12-bit mode, a 12-bit resolution is the maximum that can be provided 635 //! for the window. If in 2's complement mode, Bit 15 is used as the MSB. 636 //! 637 //! \param window Memory location to store sample/conversion 638 //! value. Possible values include: 639 //! \b ADC_COMP_WINDOW0 [DEFAULT] 640 //! \b ADC_COMP_WINDOW1 641 //! \param low is the lower limit of the window comparator 642 //! \param high is the upper limit of the window comparator 643 //! 644 //! \return false if setting fails due to an in progress conversion 645 //! 646 // 647 //***************************************************************************** 648 extern bool ADC14_setComparatorWindowValue(uint32_t window, int16_t low, 649 int16_t high); 650 651 //***************************************************************************** 652 // 653 //! 654 //! Switches between a binary unsigned data format and a signed 2's complement 655 //! data format. 656 //! 657 //! \param resultFormat Format for result to conversion results. 658 //! Possible values include: 659 //! \b ADC_UNSIGNED_BINARY [DEFAULT] 660 //! \b ADC_SIGNED_BINARY 661 //! 662 //! \return false if setting fails due to an in progress conversion 663 //! 664 // 665 //***************************************************************************** 666 extern bool ADC14_setResultFormat(uint32_t resultFormat); 667 668 //***************************************************************************** 669 // 670 //! 671 //! Returns the conversion result for the specified memory channel in the format 672 //! assigned by the ADC14_setResultFormat (unsigned binary by default) function. 673 //! 674 //! \param memorySelect is the memory location to get the conversion result. 675 //! Valid values are: 676 //! - \b ADC_MEM0 through \b ADC_MEM31 677 //! \return conversion result of specified memory channel 678 //! 679 // 680 //***************************************************************************** 681 extern uint_fast16_t ADC14_getResult(uint32_t memorySelect); 682 683 //***************************************************************************** 684 // 685 //! 686 //! Returns the conversion results of the currently configured multi-sequence 687 //! conversion. If a multi-sequence conversion has not happened, this value 688 //! is unreliable. Note that it is up to the user to verify the integrity of 689 //! and proper size of the array being passed. If there are 16 multi-sequence 690 //! results, and an array with only 4 elements allocated is passed, invalid 691 //! memory settings will occur 692 //! 693 //! \param res conversion result of the last multi-sequence sample 694 //! in an array of unsigned 16-bit integers 695 //! 696 //! \return None 697 //! 698 // 699 //***************************************************************************** 700 extern void ADC14_getMultiSequenceResult(uint16_t* res); 701 702 //***************************************************************************** 703 // 704 //! 705 //! Returns the conversion results of the specified ADC memory locations. 706 //! Note that it is up to the user to verify the integrity of 707 //! and proper size of the array being passed. If there are 16 multi-sequence 708 //! results, and an array with only 4 elements allocated is passed, invalid 709 //! memory settings will occur. This function is inclusive. 710 //! 711 //! \param memoryStart is the memory location to get the conversion result. 712 //! Valid values are: 713 //! - \b ADC_MEM0 through \b ADC_MEM31 714 //! 715 //! \param memoryEnd is the memory location to get the conversion result. 716 //! Valid values are: 717 //! - \b ADC_MEM0 through \b ADC_MEM31 718 //! \param res conversion result of the last multi-sequence sample 719 //! in an array of unsigned 16-bit integers 720 //! 721 //! \return None 722 //! 723 // 724 //***************************************************************************** 725 extern void ADC14_getResultArray(uint32_t memoryStart, uint32_t memoryEnd, 726 uint16_t* res); 727 728 //***************************************************************************** 729 // 730 //! 731 //! Enables the "on-demand" activity of the voltage reference register. If this 732 //! setting is enabled, the internal voltage reference buffer will only be 733 //! updated during a sample or conversion cycle. This is used to optimize 734 //! power consumption. 735 //! 736 //! \return false if setting fails due to an in progress conversion 737 //! 738 // 739 //***************************************************************************** 740 extern bool ADC14_enableReferenceBurst(void); 741 742 //***************************************************************************** 743 // 744 //! 745 //! Disables the "on-demand" activity of the voltage reference register. 746 //! 747 //! \return false if setting fails due to an in progress conversion 748 //! 749 // 750 //***************************************************************************** 751 extern bool ADC14_disableReferenceBurst(void); 752 753 //***************************************************************************** 754 // 755 //! 756 //! Sets the power mode of the ADC module. A more aggressive power mode will 757 //! restrict the number of samples per second for sampling while optimizing 758 //! power consumption. Ideally, if power consumption is a concern, this value 759 //! should be set to the most restrictive setting that satisfies your sampling 760 //! requirement. 761 //! 762 //! \param adcPowerMode is the power mode to set. Valid values are: 763 //! - \b ADC_UNRESTRICTED_POWER_MODE (no restriction) 764 //! - \b ADC_LOW_POWER_MODE (500ksps restriction) 765 //! - \b ADC_ULTRA_LOW_POWER_MODE (200ksps restriction) 766 //! - \b ADC_EXTREME_LOW_POWER_MODE (50ksps restriction) 767 //! 768 //! \return false if setting fails due to an in progress conversion 769 //! 770 // 771 //***************************************************************************** 772 extern bool ADC14_setPowerMode(uint32_t powerMode); 773 774 //***************************************************************************** 775 // 776 //! 777 //! Enables SAMPCON to be sourced from the sampling timer and to configures 778 //! multi sample and conversion mode. 779 //! \param multiSampleConvert - Switches between manual and automatic 780 //! iteration when using the sample timer. Valid values are: 781 //! - \b ADC_MANUAL_ITERATION The user will have to manually set the SHI signal 782 //! ( usually by ADC14_toggleConversionTrigger ) at the end 783 //! of each sample/conversion cycle. 784 //! - \b ADC_AUTOMATIC_ITERATION After one sample/convert is finished, the ADC 785 //! module will automatically continue on to the next sample 786 //! 787 //! \return false if the initialization fails due to an in progress conversion 788 // 789 //***************************************************************************** 790 extern bool ADC14_enableSampleTimer(uint32_t multiSampleConvert); 791 792 //***************************************************************************** 793 // 794 //! 795 //! Disables SAMPCON from being sourced from the sample timer. 796 //! 797 //! \return false if the initialization fails due to an in progress conversion 798 // 799 //***************************************************************************** 800 extern bool ADC14_disableSampleTimer(void); 801 802 //***************************************************************************** 803 // 804 //! 805 //! Enables the indicated ADCC interrupt sources. The ADC_INT0 806 //! through ADC_INT31 parameters correspond to a completion event of the 807 //! corresponding memory location. For example, when the ADC_MEM0 location 808 //! finishes a conversion cycle, the ADC_INT0 interrupt will be set. 809 //! 810 //! \param mask is the bit mask of interrupts to enable. 811 //! Valid values are a bitwise OR of the following values: 812 //! - \b ADC_INT0 through ADC_INT31 813 //! - \b ADC_IN_INT - Interrupt enable for a conversion in the result 814 //! register is either greater than the ADCLO or 815 //! lower than the ADCHI threshold. 816 //! - \b ADC_LO_INT - Interrupt enable for the falling short of the 817 //! lower limit interrupt of the window comparator for 818 //! the result register. 819 //! - \b ADC_HI_INT - Interrupt enable for the exceeding the upper 820 //! limit of the window comparator for the result 821 //! register. 822 //! - \b ADC_OV_INT - Interrupt enable for a conversion that is about 823 //! to save to a memory buffer that has not been read 824 //! out yet. 825 //! - \b ADC_TOV_INT -Interrupt enable for a conversion that is about 826 //! to start before the previous conversion has been 827 //! completed. 828 //! - \b ADC_RDY_INT -Interrupt enable for the local buffered reference 829 //! ready signal. 830 //! 831 //! 832 //! \return NONE 833 // 834 //***************************************************************************** 835 extern void ADC14_enableInterrupt(uint_fast64_t mask); 836 837 //***************************************************************************** 838 // 839 //! 840 //! Disables the indicated ADCC interrupt sources. Only the sources that 841 //! are enabled can be reflected to the processor interrupt; disabled sources 842 //! have no effect on the processor. The ADC_INT0 through ADC_INT31 843 //! parameters correspond to a completion event of the corresponding memory 844 //! location. For example, when the ADC_MEM0 location finishes a conversion 845 //! cycle, the ADC_INT0 interrupt will be set. 846 //! 847 //! \param mask is the bit mask of interrupts to disable. 848 //! Valid values are a bitwise OR of the following values: 849 //! - \b ADC_INT0 through ADC_INT31 850 //! - \b ADC_IN_INT - Interrupt enable for a conversion in the result 851 //! register is either greater than the ADCLO or 852 //! lower than the ADCHI threshold. 853 //! - \b ADC_LO_INT - Interrupt enable for the falling short of the 854 //! lower limit interrupt of the window comparator for 855 //! the result register. 856 //! - \b ADC_HI_INT - Interrupt enable for the exceeding the upper 857 //! limit of the window comparator for the result 858 //! register. 859 //! - \b ADC_OV_INT - Interrupt enable for a conversion that is about 860 //! to save to a memory buffer that has not been read 861 //! out yet. 862 //! - \b ADC_TOV_INT -Interrupt enable for a conversion that is about 863 //! to start before the previous conversion has been 864 //! completed. 865 //! - \b ADC_RDY_INT -Interrupt enable for the local buffered reference 866 //! ready signal. 867 //! 868 //! 869 //! \return NONE 870 // 871 //***************************************************************************** 872 extern void ADC14_disableInterrupt(uint_fast64_t mask); 873 874 //***************************************************************************** 875 // 876 //! 877 //! Returns the status of a the ADC interrupt register. The ADC_INT0 878 //! through ADC_INT31 parameters correspond to a completion event of the 879 //! corresponding memory location. For example, when the ADC_MEM0 location 880 //! finishes a conversion cycle, the ADC_INT0 interrupt will be set. 881 //! 882 //! \return The interrupt status. Value is a bitwise OR of the following values: 883 //! - \b ADC_INT0 through ADC_INT31 884 //! - \b ADC_IN_INT - Interrupt enable for a conversion in the result 885 //! register is either greater than the ADCLO or 886 //! lower than the ADCHI threshold. 887 //! - \b ADC_LO_INT - Interrupt enable for the falling short of the 888 //! lower limit interrupt of the window comparator for 889 //! the result register. 890 //! - \b ADC_HI_INT - Interrupt enable for the exceeding the upper 891 //! limit of the window comparator for the result 892 //! register. 893 //! - \b ADC_OV_INT - Interrupt enable for a conversion that is about 894 //! to save to a memory buffer that has not been read 895 //! out yet. 896 //! - \b ADC_TOV_INT -Interrupt enable for a conversion that is about 897 //! to start before the previous conversion has been 898 //! completed. 899 //! - \b ADC_RDY_INT -Interrupt enable for the local buffered reference 900 //! ready signal. 901 //! 902 //! 903 // 904 //***************************************************************************** 905 extern uint_fast64_t ADC14_getInterruptStatus(void); 906 907 //***************************************************************************** 908 // 909 //! 910 //! Returns the status of a the ADC interrupt register masked with the 911 //! enabled interrupts. This function is useful to call in ISRs to get a list 912 //! of pending interrupts that are actually enabled and could have caused the 913 //! ISR. The ADC_INT0 through ADC_INT31 parameters correspond to a 914 //! completion event of the corresponding memory location. For example, 915 //! when the ADC_MEM0 location finishes a conversion cycle, the ADC_INT0 916 // !interrupt will be set. 917 //! 918 //! \return The interrupt status. Value is a bitwise OR of the following values: 919 //! - \b ADC_INT0 through ADC_INT31 920 //! - \b ADC_IN_INT - Interrupt enable for a conversion in the result 921 //! register is either greater than the ADCLO or 922 //! lower than the ADCHI threshold. 923 //! - \b ADC_LO_INT - Interrupt enable for the falling short of the 924 //! lower limit interrupt of the window comparator for 925 //! the result register. 926 //! - \b ADC_HI_INT - Interrupt enable for the exceeding the upper 927 //! limit of the window comparator for the result 928 //! register. 929 //! - \b ADC_OV_INT - Interrupt enable for a conversion that is about 930 //! to save to a memory buffer that has not been read 931 //! out yet. 932 //! - \b ADC_TOV_INT -Interrupt enable for a conversion that is about 933 //! to start before the previous conversion has been 934 //! completed. 935 //! - \b ADC_RDY_INT -Interrupt enable for the local buffered reference 936 //! ready signal. 937 //! 938 //! 939 // 940 //***************************************************************************** 941 extern uint_fast64_t ADC14_getEnabledInterruptStatus(void); 942 943 //***************************************************************************** 944 // 945 //! 946 //! Clears the indicated ADCC interrupt sources. 947 //! 948 //! \param mask is the bit mask of interrupts to clear. The ADC_INT0 949 //! through ADC_INT31 parameters correspond to a completion event of the 950 //! corresponding memory location. For example, when the ADC_MEM0 location 951 //! finishes a conversion cycle, the ADC_INT0 interrupt will be set. 952 //! Valid values are a bitwise OR of the following values: 953 //! - \b ADC_INT0 through ADC_INT31 954 //! - \b ADC_IN_INT - Interrupt enable for a conversion in the result 955 //! register is either greater than the ADCLO or 956 //! lower than the ADCHI threshold. 957 //! - \b ADC_LO_INT - Interrupt enable for the falling short of the 958 //! lower limit interrupt of the window comparator for 959 //! the result register. 960 //! - \b ADC_HI_INT - Interrupt enable for the exceeding the upper 961 //! limit of the window comparator for the result 962 //! register. 963 //! - \b ADC_OV_INT - Interrupt enable for a conversion that is about 964 //! to save to a memory buffer that has not been read 965 //! out yet. 966 //! - \b ADC_TOV_INT -Interrupt enable for a conversion that is about 967 //! to start before the previous conversion has been 968 //! completed. 969 //! - \b ADC_RDY_INT -Interrupt enable for the local buffered reference 970 //! ready signal. 971 //! 972 //! 973 //! \return NONE 974 // 975 //***************************************************************************** 976 extern void ADC14_clearInterruptFlag(uint_fast64_t mask); 977 978 //***************************************************************************** 979 // 980 //! 981 //! Registers an interrupt handler for the ADC interrupt. 982 //! 983 //! \param intHandler is a pointer to the function to be called when the ADC 984 //! interrupt occurs. 985 //! 986 //! This function registers the handler to be called when an ADC 987 //! interrupt occurs. This function enables the global interrupt in the 988 //! interrupt controller; specific ADC14 interrupts must be enabled 989 //! via ADC14_enableInterrupt(). It is the interrupt handler's responsibility 990 //! to clear the interrupt source via ADC14_clearInterruptFlag(). 991 //! 992 //! \sa Interrupt_registerInterrupt() for important information about 993 //! registering interrupt handlers. 994 //! 995 //! \return None. 996 // 997 //***************************************************************************** 998 extern void ADC14_registerInterrupt(void (*intHandler)(void)); 999 1000 //***************************************************************************** 1001 // 1002 //! 1003 //! Unregisters the interrupt handler for the ADCC module. 1004 //! 1005 //! This function unregisters the handler to be called when an ADCC 1006 //! interrupt occurs. This function also masks off the interrupt in the 1007 //! interrupt controller so that the interrupt handler no longer is called. 1008 //! 1009 //! \sa Interrupt_registerInterrupt() for important information about 1010 //! registering interrupt handlers. 1011 //! 1012 //! \return None. 1013 // 1014 //***************************************************************************** 1015 extern void ADC14_unregisterInterrupt(void); 1016 1017 /* Defines for future devices that might have multiple instances */ 1018 #define ADC14_enableModuleMultipleInstance(a) ADC14_enableModule() 1019 #define ADC14_disableModuleMultipleInstance(a) ADC14_disableModule() 1020 #define ADC14_initModuleMultipleInstance(a,b,c,d,e) ADC14_initModule(b,c,d,e) 1021 #define ADC14_setResolutionMultipleInstance(a,b) ADC14_setResolution(b) 1022 #define ADC14_getResolutionMultipleInstance(a) ADC14_getResolution() 1023 #define ADC14_setSampleHoldTriggerMultipleInstance(a,b,c) ADC14_setSampleHoldTrigger(b,c) 1024 #define ADC14_setSampleHoldTimeMultipleInstance(a,b,c) ADC14_setSampleHoldTime(b,c) 1025 #define ADC14_configureMultiSequenceModeMultipleInstance(a,b,c,d) ADC14_configureMultiSequenceMode(b,c,d) 1026 #define ADC14_configureSingleSampleModeMultipleInstance(a,b,c) ADC14_configureSingleSampleMode(b,c) 1027 #define ADC14_enableConversionMultipleInstance(a,b) ADC14_enableConversion(b) 1028 #define ADC14_disableConversionMultipleInstance(a) ADC14_disableConversion() 1029 #define ADC14_toggleConversionTriggerMultipleInstance(a) ADC14_toggleConversionTrigger() 1030 #define ADC14_isBusyMultipleInstance(a) ADC14_isBusy() 1031 #define ADC14_configureConversionMemoryMultipleInstance(a,b,c,d,e) ADC14_configureConversionMemory(b,c,d,e) 1032 #define ADC14_enableComparatorWindowMultipleInstance(a,b,c) ADC14_enableComparatorWindow(b,c) 1033 #define ADC14_disableComparatorWindowMultipleInstance(a,b) ADC14_disableComparatorWindow(b) 1034 #define ADC14_setComparatorWindowValueMultipleInstance(a,b,c,d) ADC14_setComparatorWindowValue(b,c,d) 1035 #define ADC14_setResultFormatMultipleInstance(a,b) ADC14_setResultFormat(b) 1036 #define ADC14_getResultMultipleInstance(a,b) ADC14_getResult(b) 1037 #define ADC14_getMultiSequenceResultMultipleInstance(a,b) ADC14_getMultiSequenceResult(b) 1038 #define ADC14_getResultArrayMultipleInstance(a,b,c,d) ADC14_getResultArray(b,c,d) 1039 #define ADC14_enableReferenceBurstMultipleInstance(a) ADC14_enableReferenceBurst() 1040 #define ADC14_disableReferenceBurstMultipleInstance(a) ADC14_disableReferenceBurst() 1041 #define ADC14_setPowerModeMultipleInstance(a,b) ADC14_setPowerMode(b) 1042 #define ADC14_enableSampleTimerMultipleInstance(a,b) ADC14_enableSampleTimer(b) 1043 #define ADC14_disableSampleTimerMultipleInstance(a) ADC14_disableSampleTimer() 1044 #define ADC14_enableInterruptMultipleInstance(a,b) ADC14_enableInterrupt(b) 1045 #define ADC14_disableInterruptMultipleInstance(a,b) ADC14_disableInterrupt(b) 1046 #define ADC14_getInterruptStatusMultipleInstance(a) ADC14_getInterruptStatus() 1047 #define ADC14_getEnabledInterruptStatusMultipleInstance(a) ADC14_getEnabledInterruptStatus() 1048 #define ADC14_clearInterruptFlagMultipleInstance(a,b) ADC14_clearInterruptFlag(b) 1049 #define ADC14_registerInterruptMultipleInstance(a,b) ADC14_registerInterrupt(b) 1050 #define ADC14_unregisterInterruptMultipleInstance(a) ADC14_unregisterInterrupt() 1051 1052 //***************************************************************************** 1053 // 1054 // Mark the end of the C bindings section for C++ compilers. 1055 // 1056 //***************************************************************************** 1057 #ifdef __cplusplus 1058 } 1059 #endif 1060 1061 //***************************************************************************** 1062 // 1063 // Close the Doxygen group. 1064 //! @} 1065 // 1066 //***************************************************************************** 1067 1068 #endif /* ADC14_H_ */ 1069
