1 /******************************************************************************
2 * Copyright (c) 2022 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
3 * All rights reserved.
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************/
18
19 /********************************************************************************************************
20 * @file watchdog.h
21 *
22 * @brief This is the header file for B91
23 *
24 * @author Driver Group
25 *
26 *******************************************************************************************************/
27 #ifndef WATCHDOG_H_
28 #define WATCHDOG_H_
29 #include "analog.h"
30 #include "gpio.h"
31
32 /**
33 * @brief start watchdog.
34 * @return none
35 */
wd_start(void)36 static inline void wd_start(void){
37
38 BM_SET(reg_tmr_ctrl2, FLD_TMR_WD_EN);
39 }
40
41
42 /**
43 * @brief stop watchdog.
44 * @return none
45 */
wd_stop(void)46 static inline void wd_stop(void){
47 BM_CLR(reg_tmr_ctrl2, FLD_TMR_WD_EN);
48 }
49
50
51 /**
52 * @brief clear watchdog.
53 * @return none
54 */
wd_clear(void)55 static inline void wd_clear(void)
56 {
57 reg_tmr_sta = FLD_TMR_STA_WD|FLD_TMR_WD_CNT_CLR;
58
59 }
60
61 /**
62 * @brief clear watchdog timer tick cnt.
63 * @return none
64 */
wd_clear_cnt(void)65 static inline void wd_clear_cnt(void)
66 {
67 reg_tmr_sta = FLD_TMR_WD_CNT_CLR;
68
69 }
70
71 /**
72 * @brief This function set the watchdog trigger time.
73 * Because the lower 8bit of the wd timer register will always be 0, there will be an error ,
74 The time error = (0x00~0xff)/(APB clock frequency)
75 * @param[in] period_ms - The watchdog trigger time. Unit is millisecond
76 * @return none
77 * @attention The clock source of watchdog comes from pclk, when pclk changes it needs to be reconfigured.
78 */
wd_set_interval_ms(unsigned int period_ms)79 static inline void wd_set_interval_ms(unsigned int period_ms)
80 {
81 static unsigned int tmp_period_ms = 0;
82 tmp_period_ms=period_ms*sys_clk.pclk*1000;
83 reg_wt_target=tmp_period_ms;
84 }
85
86 #endif
87
